Product Specs

47 PWM — Pulse width modulation
Page
504
Figure 149: Complex sequence (LOOP.CNT>0) starting with SEQ[1]
Note that if a sequence is in use in a simple or complex sequence, it must have a length of SEQ[n].CNT > 0 .
47.3 Limitations
The previous compare value will be repeated if the PWM period is selected to be shorter than the time it
takes for the EasyDMA to fetch from RAM and update the internal compare registers.
This is to ensure a glitch-free operation even if very short PWM periods are chosen.
47.4 Pin configuration
The OUT[n] (n=0..3) signals associated to each channel of the PWM module are mapped to
physical pins according to the configuration specified in the respective PSEL.OUT[n] registers. If a
PSEL.OUT[n].CONNECT is set to Disconnected, the associated PWM module signal will not be connected
to any physical pins.
The PSEL.OUT[n] registers and their configurations are only used as long as the PWM module is enabled
and PWM generation is active (wave counter started), and retained only as long as the device is in System
ON mode, see POWER chapter for more information about power modes.
To ensure correct behaviour in the PWM module, the pins used by the PWM module must be configured in
the GPIO peripheral as described in Table 117: Recommended GPIO configuration before starting PWM
generation on page 505 before enabling the PWM module. The pins' idle state is defined by the OUT
registers in the GPIO module. This is to ensure that the pins used by the PWM module are driven correctly,
if PWM generation is stopped through a STOP task, the PWM module itself is temporarily disabled, or the
device temporarily enters System OFF. This configuration must be retained in the GPIO for the selected IOs
as long as the PWM module is supposed to be connected to an external PWM circuit.
Only one peripheral can be assigned to drive a particular GPIO pin at a time. Failing to do so may result in
unpredictable behaviour.
LOOP.CNT
(LOOP.CNT - 1)
...
1
100% duty cycle
Previously
loaded
d le
uty cyc
last loaded
duty cycle
maintained
0% duty cycle
New value load
Loop counter
TASKS_SEQSTART[1]
EVENTS_SEQSTARTED[1]
EVENTS_SEQEND[1]
SEQ[1].CNT
SEQ[1].ENDDELA Y
SEQ[0].CNT
EVENTS_SEQSTARTED[0]
SEQ[0].ENDDELA Y SEQ[1].CNT
EVENTS_SEQEND[0]
EVENTS_SEQSTARTED[1]
EVENTS_SEQEND[1]
EVENTS_SEQSTARTED[0]
SEQ[0].CNT
EVENTS_SEQEND[0]
SEQ[0].ENDDELA Y SEQ[1].CNT
EVENTS_SEQSTARTED[1]
EVENTS_SEQEND[1]
EVENTS_LOOPSDONE
SEQ[1].ENDDELA Y