Product Specs

47 PWM — Pulse width modulation
Page
510
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
B
0
7
0
6
0
5
0
4
0
3
0
2
A
0
1
A
0
0
A
0
Id RW Field
Value Id
Value
Description
A RW LOAD
Common
0
How a sequence is read from RAM and spread to the compare
register
1st half word (16-bit) used in all PWM channels 0..3
Grouped
Individual
1
2
1st half word (16-bit) used in channel 0..1; 2nd word in channel
2..3
1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in ch.3
WaveForm
3
1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in
COUNTERTOP
B RW MODE
RefreshCount
0
Selects source for advancing the active sequence
SEQ[n].REFRESH is used to determine loading internal compare
NextStep
1
registers
NEXTSTEP task causes a new value to be loaded to internal
compare registers
47.5.10 LOOP
Address offset: 0x514
Amount of playback of a loop
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
A
0
14
A
0
13
A
0
12
A
0
11
A
0
10
A
0
9
A
0
8
A
0
7
A
0
6
A
0
5
A
0
4
A
0
3
A
0
2
A
0
1
A
0
0
A
0
Id RW Field
Value Id
Value
Description
A RW CNT Amount of playback of pattern cycles
Disabled 0 Looping disabled (stop at the end of the sequence)
47.5.11 SEQ[0].PTR
Address offset: 0x520
Beginning address in Data RAM of this sequence
Bit number
31 30
29
28
27
26
25
24
23 22 21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Id
A A
A
A
A
A
A
A
A A A A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Reset 0x00000000
0 0
0
0
0
0
0
0
0 0 0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Id
RW Field
Value Id
Value
Description
A RW PTR Beginning address in Data RAM of this sequence
47.5.12 SEQ[0].CNT
Address offset: 0x524
Amount of values (duty cycles) in this sequence
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
A
0
13
A
0
12
A
0
11
A
0
10
A
0
9
A
0
8
A
0
7
A
0
6
A
0
5
A
0
4
A
0
3
A
0
2
A
0
1
A
0
0
A
0
Id RW Field
Value Id
Value
Description
A RW CNT Amount of values (duty cycles) in this sequence
Disabled 0 Sequence is disabled, and shall not be started as it is empty
47.5.13 SEQ[0].REFRESH
Address offset: 0x528
Amount of additional PWM periods between samples loaded into compare register