Product Specs

49 TWI — I
2
C compatible two-wire interface
Page
529
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
0
2
C
0
1
B
0
0
A
0
Id RW Field
Value Id
Value
Description
Present 1 Read: error present
Clear 1 Write: clear error on writing '1'
49.8.5 ENABLE
Address offset: 0x500
Enable TWI
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
A
0
2
A
0
1
A
0
0
A
0
Id RW Field
Value Id
Value
Description
A RW ENABLE Enable or disable TWI
Disabled 0 Disable TWI
Enabled 5 Enable TWI
49.8.6 PSELSCL
Address offset: 0x508
Pin select for SCL
Bit number
31 30
29
28
27
26
25
24
23 22 21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Id
A A
A
A
A
A
A
A
A A A A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Reset 0xFFFFFFFF
1 1
1
1
1
1
1
1
1 1 1 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Id
RW Field
Value Id
Value
Description
A RW PSELSCL [0..31] Pin number configuration for TWI SCL signal
Disconnected 0xFFFFFFFF Disconnect
49.8.7 PSELSDA
Address offset: 0x50C
Pin select for SDA
Bit number
31 30
29
28
27
26
25
24
23 22 21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Id
A A
A
A
A
A
A
A
A A A A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Reset 0xFFFFFFFF
1 1
1
1
1
1
1
1
1 1 1 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Id
RW Field
Value Id
Value
Description
A RW PSELSDA [0..31] Pin number configuration for TWI SDA signal
Disconnected 0xFFFFFFFF Disconnect
49.8.8 RXD
Address offset: 0x518
RXD register
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
A
0
6
A
0
5
A
0
4
A
0
3
A
0
2
A
0
1
A
0
0
A
0
Id RW Field
Value Id
Value
Description
A R RXD RXD register
49.8.9 TXD
Address offset: 0x51C
TXD register