Product Specs

49 TWI — I
2
C compatible two-wire interface
Page
530
CL
NT
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
A
0
6
A
0
5
A
0
4
A
0
3
A
0
2
A
0
1
A
0
0
A
0
Id RW Field
Value Id
Value
Description
A RW TXD TXD register
49.8.10 FREQUENCY
Address offset: 0x524
TWI frequency
Bit number
31 30
29
28
27
26
25
24
23 22 21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Id
A A
A
A
A
A
A
A
A A A A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Reset 0x04000000
0 0
0
0
0
1
0
0
0 0 0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Id
RW Field
Value Id
Value
Description
A RW FREQUENCY
TWI master clock frequency
K100
0x01980000
100 kbps
K250
0x04000000
250 kbps
K400
0x06680000
400 kbps (actual rate 410.256 kbps)
49.8.11 ADDRESS
Address offset: 0x588
Address used in the TWI transfer
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
A
0
5
A
0
4
A
0
3
A
0
2
A
0
1
A
0
0
A
0
Id RW Field
Value Id
Value
Description
A RW ADDRESS
49.9 Electrical specification
49.9.1 TWI interface electrical specifications
Address used in the TWI transfer
Symbol Description
Min.
Typ.
Max.
Units
f
TWI
Bit rates for TWI
41
100
400
kbps
I
TWI,100kbps
Run current for TWI, 100 kbps
50
µA
I
TWI,400kbps
Run current for TWI, 400 kbps
50
µA
t
TWI,START,LP
Time from STARTRX/STARTTX task to transmission started, Low
power mode
t
TWI,START,
+
t
START_HFI
µs
t
TWI,START,CL
Time from STARTRX/STARTTX task to transmission started,
Constant latency mode
1.5
µs
49.9.2 Two Wire Interface (TWI) timing specifications
Symbol
Description
Min.
Typ.
Max.
Units
f
TWI,SCL,100kbps
SCL clock frequency, 100 kbps
100
kHz
f
TWI,SCL,250kbps
SCL clock frequency, 250 kbps
250
kHz
f
TWI,SCL,400kbps
SCL clock frequency, 400 kbps
400
kHz
t
TWI,SU_DAT
Data setup time before positive edge on SCL – all modes
300
ns
t
TWI,HD_DAT
Data hold time after negative edge on SCL – all modes
500
ns
t
TWI,HD_STA,100kbps
TWI master hold time for START and repeated START condition,
100 kbps
10000
ns
41
Higher bit rates or stronger pull-ups may require GPIOs to be set as High Drive, see GPIO chapter for more
details.