Product Specs

50 UART — Universal asynchronous receiver/
transmitter
Page
538
D RW BREAK
Break condition
NotPresent
Present
0
1
The serial data input is '0' for longer than the length of a data
frame. (The data frame length is 10 bits without parity bit, and
11 bits with parity bit.).
Read: error not present
Read: error present
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
D
0
2
C
0
1
B
0
0
A
0
Id RW Field
Value Id
Value
Description
A valid stop bit is not detected on the serial data input after all
bits in a character have been received.
NotPresent 0 Read: error not present
Present 1 Read: error present
50.10.5 ENABLE
Address offset: 0x500
Enable UART
Bit number
Id
Reset 0x00000000
31 30
0 0
29
0
28
0
27
0
26
0
25
0
24
0
23 22 21 20
0 0 0 0
19
0
18
0
17
0
16
0
15
0
14
0
13
0
12
0
11
0
10
0
9
0
8
0
7
0
6
0
5
0
4
0
3
A
0
2
A
0
1
A
0
0
A
0
Id RW Field
Value Id
Value
Description
A RW ENABLE Enable or disable UART
Disabled 0 Disable UART
Enabled 4 Enable UART
50.10.6 PSELRTS
Address offset: 0x508
Pin select for RTS
Bit number
31 30
29
28
27
26
25
24
23 22 21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Id
A A
A
A
A
A
A
A
A A A A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Reset 0xFFFFFFFF
1 1
1
1
1
1
1
1
1 1 1 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Id
RW Field
Value Id
Value
Description
A RW PSELRTS [0..31] Pin number configuration for UART RTS signal
Disconnected 0xFFFFFFFF Disconnect
50.10.7 PSELTXD
Address offset: 0x50C
Pin select for TXD
Bit number
31 30
29
28
27
26
25
24
23 22 21 20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Id
A A
A
A
A
A
A
A
A A A A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Reset 0xFFFFFFFF
1 1
1
1
1
1
1
1
1 1 1 1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Id
RW Field
Value Id
Value
Description
A RW PSELTXD [0..31] Pin number configuration for UART TXD signal
Disconnected 0xFFFFFFFF Disconnect
50.10.8 PSELCTS
Address offset: 0x510
Pin select for CTS