Product Specs

Contents
Page
6
37.8 Reference 363
37.9 Acquisition time 363
37.10 Limits event monitoring 364
37.11 Registers 365
37.12 Electrical specification 389
37.13 Performance factors 391
38 COMP — Comparator 392
38.1 Shared resources 393
38.2 Differential mode 393
38.3 Single-ended mode 394
38.4 Pin configuration 396
38.5 Registers 396
38.6 Electrical specification 401
39 LPCOMP — Low power comparator....................................................................... 403
39.1 Shared resources 404
39.2 Pin configuration 404
39.3 Registers 405
39.4 Electrical specification 409
40 WDT — Watchdog timer 410
40.1 Reload criteria 410
40.2 Temporarily pausing the watchdog410
40.3 Watchdog reset 410
40.4 Registers 411
40.5 Electrical specification 415
41 SWI — Software interrupts 416
41.1 Registers 416
42 NFCT — Near field communication tag
.................................................................
417
42.1 Overview 417
42.2 Pin configuration 419
42.3 EasyDMA 419
42.4 Collision resolution 420
42.5 Frame timing controller 421
42.6 Frame assembler 422
42.7 Frame disassembler 423
42.8 Antenna interface 424
42.9 NFCT antenna recommendations 424
42.10 Battery protection 424
42.11 References 425
42.12 Registers 425
42.13 Electrical specification 436
43 PDM — Pulse density modulation interface
.........................................................
437
43.1 Master clock generator 437
43.2 Module operation 437
43.3 Decimation filter 438
43.4 EasyDMA 438
43.5 Hardware example 439
43.6 Pin configuration 439
43.7 Registers 440
43.8 Electrical specification 444
44 I
2
S — Inter-IC sound interface 446
44.1 Mode 446
44.2 Transmitting and receiving 446
44.3 Left right clock (LRCK) 447
44.4 Serial clock (SCK) 447
44.5 Master clock (MCK) 448
44.6 Width, alignment and format 448
44.7 EasyDMA 450