Hardware manual

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990-0000058-1000 Rev F Page 21
Figure 3-3 Sub-Bottom Acquisition Board
3.2.3. Sonar/IDE Interface Board
The sonar/IDE interface board is comprised of two RAM memory banks Acquisition
memory and chirp memory and six 10-bit DAC for generating transmit waveforms.
Transmit ping rate and sampling clock are generated from this board. The IDE portion of
the board provides the interfacing circuitry required to communicate between the
embedded processor and the SIB board set.