Reference Manual

Hardware Reference Manual
Version 1.0 - 38 - eInfochips Confidential
Major Interfaces of ERAGON660 SBC
6.2.1 Processor SDA660 - Features and interfaces
 The Qualcomm SDA660 includes a customized 64-bit ARM v8-compliant applications processor
(Kryo 260)
 Quad high-performance Kryo cores targeting 2.2 GHz – Gold cluster with 1 MB L2 & Quad low-
power Kryo cores targeting 1.843 GHz – Silver cluster with 1 MB L2
 It embraces Qualcomm Hexagon DSP with Hexagon Vector eXtensions (dual-HVX512) 787 MHz.
 Low power island with Hexagon DSP consists of Snapdragon sensor core and low power audio
subsystem
Memory Support Features
 Dual-channel non-PoP high-speed memory – LPDDR4 /LPDR4x SDRAM designed for a 1866 MHz
clock.
 Support up to 64GB external eMMC v5.1 memory via SDC1 interface.
 UFS 2.1 gear 3 (one-lane) and SD 3.0
Multimedia features
 Three 4-lane CSIs (4/4/4 or 4/4/2/1) D-PHY 1.2 at 2.1 Gbps per lane or three 3-lane C-PHY 1.0 at
17 Gbps (2.5 G symbols per trio per second)
 Dual 14-bit image signal processing (ISP): 16 +16 MP, 540 MHz each; 24MP30 ZSL with dual ISP;
16 MP 30 ZSL with a single ISP
 Video support: 3840 × 2160 at 30 Hz, HEVC Main 10, VP9, H264, and other popular video
formats Two MI2S Ports for Audio interface.
 Processor supports one port SLIM bus interfaces to WCD9335 codec.
 Processor also support CDC PDM port to interface with PM660l for audio applications.
Web technologies
 V8 JavaScript Engine optimizations
 Web kit browser JPEG hardware decode acceleration
 Networking Stack IP and HTTP tuning
 Flash 10.x and video processor decode optimization.
Connectivity
 8, 4-bits each BLSP Ports which can be configured as UART, I2C and SPI.
 One USB 3.1/2.0 Port.
 Gigabit Ethernet connectivity on IO Card.