User`s manual

Software Manual • EKF Intelligent I/O Controller Family On CompactPCI
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Outbound Interrupt MASK Register (OIMR)
Bit Access Description
31:08 Read Only Reserved (Read as 0)
7 Read/Write PCI Doorbell Interrupt D Mask.
6 Read Only PCI Doorbell Interrupt C Mask.
5 Read Only PCI Doorbell Interrupt B Mask.
4 Read Only PCI Doorbell Interrupt A Mask.
3 Read Only Outbound Post Queue Interrupt Mask.
2 Read Only Outbound Doorbell Interrupt Mask.
1 Read/Clear Outbound Message 1 Interrupt Mask.
0 Read/Clear Outbound Message 0 Interrupt Mask.
0 - interrupt generation allowed
1 - interrupt generation disabled
Mailbox
Although the MU offers many possibilities to exchange data and to request servicing of a
new message, EKF's I/O boards only use the Inbound Message Register 0 (IMR0) to send
a message to the controller. In return the controller sends messages via the Outbound
Message Register 0 (OMR0).
Writing a message to the IMR0 will request an interrupt on the controller that is serviced by
the firmware. After any necessary actions involved with the message are done, the
controller's firmware answers by writing a message to the OMR0. If enabled in the Outbound
Interrupt Mask Register OIMR (by clearing bit 0 of OIMR), this will request an interrupt on the
CompactPCI bus.
The Outbound Interrupt Status Register (OISR) will reflect the source of the MU interrupt by
setting bit 0. The interrupt request is cleared in the interrupt service routine by writing a one
to this bit position (i.e. setting bit 0 of OISR).
Of course it is also possible to poll bit 0 of OISR to recognize a message from the controller
if interrupt processing should be avoided.
Buffer / Parameter Areas
Messages to or from the controller may require parameters or pass data with them.
Therefore data and parameter buffers are existing within the MU.
Parameters are passed to the controller by the inbound parameter buffer while in the
opposite direction the outbound parameter buffer is used. There exists one inbound and one
outbound parameter buffer each of fixed size that are shared by all devices on the I/O