
Élan™SC310 Microcontroller Data Sheet 97
PRELIMINARY
t41d
RAS
t36
t40
t38
t30
t31
t34
t44d
t39
t27d
t43
t5c
t49
t5c
MA10–MA0
CAS
MWE
D15–D0
Figure 39. DRAM First Cycle Bank/Page Miss (Write Cycles)
t33
t32
First Cycle
Bank/Page Miss
t49
t29b
t41c
t27c
t39
t44c