Data Sheet

ITG-3200 Product Specification
Document Number: PS-ITG-3200A-00-01.4
Revision: 1.4
Release Date: 03/30/2010
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I
2
C Terms
Signal
Description
S
Start Condition: SDA goes from high to low while SCL is high
AD
Slave I
2
C address
W
Write bit (0)
R
Read bit (1)
ACK
Acknowledge: SDA line is low while the SCL line is high at the 9
th
clock cycle
NACK
Not-Acknowledge: SDA line stays high at the 9
th
clock cycle
RA
ITG-3200 internal register address
DATA
Transmit or received data
P
Stop condition: SDA going from low to high while SCL is high