User manual

BeeProg2 / BeeProg2C / BeeProg+
package support includes DIP, SDIP, PLCC, JLCC, SOIC, SOP, PSOP, SSOP, TSOP,
TSOPII, TSSOP, QFP, PQFP, TQFP, VQFP, QFN (MLF), SON, BGA, EBGA, FBGA,
VFBGA, UBGA, FTBGA, LAP, CSP, SCSP etc.
support devices in non-DIP packages up to 48 pins with universal adapters
programmer is compatible with third-party adapters for non-DIP support
Programming speed
BeeProg2 / BeeProg2C
Device Size [bits] Operation Time
H26M11002AAR (eMMC NAND Flash) 3C780000hx8 (8 Giga) programming *1 480 sec
K8P6415UQB (parallel NOR Flash) 400100Hx16 (64 Mega) programming and verify 13 sec
K9F1G08U0M (parallel NAND Flash) 8400000Hx8 (1 Giga) programming and verify 122.7 sec
QB25F640S33 (serial Flash) 800200Hx8 (64 Mega) programming and verify 30.7 sec
AT89C51RD2 (microcontroller) 10000Hx8 programming and verify 14.4 sec
PIC32MX360F512L (microcontroller) 80000Hx8 programming and verify 8.9 sec
Conditions: P4, 2.4GHz, 512MB RAM, USB2.0, Windows XP
*1 implementation is the same as in card readers. Verification of programming is performs
internal controller. Internal controller confirm the proper programming using status register.
BeeProg+
Device Size [bits] Operation Time
M50FW080 (parallel Flash) 100000Hx8 (8 Mega) programming and verify 22 sec
MX28F640C3BT (parallel Flash) 400000Hx16 (64 Mega) programming and verify 57 sec
K9F1G08U0M (parallel NAND Flash) 8400000Hx8 (1 Giga) programming and verify 239 sec
AT45D081 (serial Flash) 108000Hx8 (16 Mega) programming and verify 36 sec
AT89C51RD2 (microcontroller) 10000Hx8 programming and verify 15 sec
PIC18LF452 (microcontroller) 4000Hx16 programming and verify 4 sec
Conditions: P4, 2,4GHz, 512 MB RAM, USB 2.0 HS, Windows XP
SOFTWARE
Algorithms: only manufacturer approved or certified algorithms are used. Custom
algorithms are available at additional cost.
Algorithm updates: software updates are available regularly, approx. every 4 weeks, free
of charge. OnDemand version of software is available for highly needed chips support
and/or bugs fixes. Available nearly daily.
Main features: revision history, session logging, on-line help, device and algorithm
information
Device operations
standard:
intelligent device selection by device type, manufacturer or typed fragment of part name
automatic ID-based selection of EPROM/Flash EPROM
blank check, read, verify
program
erase
configuration and security bit program
illegal bit test
checksum
interprete the Jam Standard Test and Programming Language (STAPL), JEDEC standard
JESD-71
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