Product Diagram

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3.3V Only
1.8V Only VDDPST=VDDIO=1.8V
VDDPST=1.8V,VDDIO=3.3V
other 3.0V mode:VDDPST=1.5V,VDDIO=3.0V
1.8V mode:VDDPST=1.8V,VDDIO=1.8V
Note:RK3399 part I is 3.3V only Note:RK3399 part E is 1.8V/3.0V mode
Note:RK3399 part G is 1.8V only
Note:RK3399 part J is 1.8V/3.0V mode
Note:RK3399 part K is 1.8V/3.0V mode
SDIO design rule:
1.Data[0:7] and CMD signals routing
parallel as a group, the skew between
each other must be less than 100mils;
2.The Clock signal should be isolated with
other signals by GND plane, the skew
between data lines is less than 20ps;
3.Max trace length < 3.93 inchs;
4.Trace impedance 50ohm+/-10%;
5.The distance between other signals
follows the 3W rule;
PART E 3V
PART J 1.8V
TP 的 INT 加上拉； rest 上拉预留
20200706
电阻值由 2.2K 改为 10K. 20210915
VCC_1V8
VCC_1V8
VCC_1V5 VCC_3V0
VCC_1V5
VCC_3V0
VCC_1V5
VCC_3V0
VCC_1V5
VCC_3V0
VCC_3V0
VCC_3V0
VCC1V8_CODEC VCC1V8_CODEC
VCC1V8_CODEC
VCC1V8_CODEC
VCC1V8_CODEC
VCC_3V0
VCC_3V0
VCC3V3_LAN
VCC_1V8
VCC_1V8
VCC_1V8
VCC_3V0
VCC3V3_LAN
VCC3V3_S0
UART0_TXD [23]
SDIO0_CMD [23]
SDIO0_CLK [23]
SDIO0_D0 [23]
SDIO0_D1 [23]
SDIO0_D3 [23]
SDIO0_D2 [23]
PMIC_SLEEP_H [18]
OTP_OUT_H [18]
I2C_SDA_PMIC [18,29]
I2C_SCL_PMIC [18,29]
I2C3_SDA [21]
I2C3_SCL [21]
TP_INT [21]
UART0_RXD [23]
UART0_RTS [23]
UART0_CTS [23]
LOG_DVS_PWM [18]
EFUSE_VQPS_EN_H [32]
AMP-MUTE [26]
MIPI_PWM [28]
GPU_SLEEP_H [18]
CPU_B_SLEEP_H [18]
I2S0_SCLK [26]
I2S0_LRCK_TX [26]
I2S0_SDI0 [26]
I2C4_SDA [29]
I2C4_SCL [29]
BT_WAKE_L [23]
I2C1_SDA_1V8 [19,26]
I2C1_SCL_1V8 [19,26]
I2S1_SCLK [23]
I2S1_LRCK_RX [23]
I2S1_SDI0 [23]
I2S_MCLK [26]
EDP_ONOFF [28]
I2S0_LRCK_RX [26]
I2S0_SDO0 [26]
I2S1_SDO0 [23]
TP_RST [21]
LED_STATE [18]
EDP_POWON [28]
ID1_3V0 [20]
PMIC_INT_L [18]
WLED [25]
EDP_HPD [28]
GPIO2_D4 [12]
CAMERA_AF_EN [30]
EDP_BL_POWON [28]
UART2DBG_TX [20]
UART2DBG_RX [20]
GPIO3_D6 [12]
GSENSOR_INT_L_1V8 [29]
YLED [25]
GPIO1_TP [21]
GPIO2_TP [21]
VCC5V0_USB1 [20]
EX_5V_EN [17]
GSENSOR_INT_L_1V8 [29]
Project:
File:
Date:
Designed by:
Rev:
Sheet: of
Monday, December 20, 2021
15.RK3399 GPIO
E679524
ZHangliubi n 15 32
A1
Project:
File:
Date:
Designed by:
Rev:
Sheet: of
Monday, December 20, 2021
15.RK3399 GPIO
E679524
ZHangliubi n 15 32
A1
Project:
File:
Date:
Designed by:
Rev:
Sheet: of
Monday, December 20, 2021
15.RK3399 GPIO
E679524
ZHangliubi n 15 32
A1
C118
0.1uF/16V
C0201
R52 2.2K R0402
C117
0.1uF/16V
C0201
R629 10K R0402
R58 2.2K R0402
R61
10K
R0402
U1G
RK3399
GPIO2_C0/UART0_RX_u
AE9
GPIO2_C1/UART0_TX_u
AH8
GPIO2_C2/UART0_CTSn_u
AG8
GPIO2_C3/UART0_RTSn_u
AL5
GPIO2_C4/SDIO0_D0/SPI5_RXD_u
AD8
GPIO2_C5/SDIO0_D1/SPI5_TXD_u
AK5
GPIO2_C6/SDIO0_D2/SPI5_CLK_u
AG7
GPIO2_C7/SDIO0_D3/SPI5_CSn0_u
AE8
GPIO2_D0/SDIO0_CMD_u
AH6
GPIO2_D1/SDIO0_CLKOUT/TEST_CLKOUT1_u
AF7
GPIO2_D2/SDIO0_DETN/PCIE_CLKREQn_u
AL4
GPIO2_D3/SDIO0_PW REN_d
AD9
GPIO2_D4/SDIO0_BKPWR_d
AF8
APIO3_VDD_1V8
AB8
C114
0.1uF/16V
C0201
U1K
RK3399
GPIO4_C0/I2C3_SDA/UART2B_RX_u
AG6
GPIO4_C1/I2C3_SCL/UART2B_TX_u
AL2
GPIO4_C2/PWM0/VOP0_PWM/VOP1_PWM_d
AF5
GPIO4_C3/UART2C_RX_u
AK2
GPIO4_C4/UART2C_TX_u
AJ4
GPIO4_C5/SPDIF_TX_d
AK1
GPIO4_C6/PWM1_d
AL3
GPIO4_C7/HDMI_CECINOUT/EDP_HOTPLUG_u
AD7
GPIO4_D0/PCIE_CLKREQnB_u
AE6
GPIO4_D1/DP_HOTPLUG_d
AK4
GPIO4_D2_d
AH3
GPIO4_D3_d
AK3
GPIO4_D4_d
AH5
APIO4_VDDPST
AC8
GPIO4_D5_d
AJ3
GPIO4_D6_d
AG4
APIO4_VDD
AC9
R51 2.2K R0402
C187
0.1uF/16V
C0201
L53 FB_60R_0603 L0603
C120
0.1uF/16V
C0201
U1J
RK3399
GPIO3_D0/I2S0_SCLK_d
AG3
GPIO3_D1/I2S0_LRCK_RX_d
AF4
GPIO3_D2/I2S0_LRCK_TX_d
AJ2
GPIO3_D3/I2S0_SDI0_d
Y7
GPIO3_D4/I2S0_SDI1SDO3_d
AE5
GPIO3_D5/I2S0_SDI2SDO2_d
AA6
GPIO3_D6/I2S0_SDI3SDO1_d
AH2
GPIO3_D7/I2S0_SDO0_d
AH1
GPIO4_A0/I2S_CLK_d
AC7
APIO5_VDD
Y8
APIO5_VDDPST
AA8
GPIO4_A1/I2C1_SDA_u
AG1
GPIO4_A2/I2C1_SCL_u
Y6
GPIO4_A3/I2S1_SCLK_d
AF3
GPIO4_A4/I2S1_LRCK_RX_d
AA7
GPIO4_A5/I2S1_LRCK_TX_d
AJ1
GPIO4_A6/I2S1_SDI0_d
AD6
GPIO4_A7/I2S1_SDO0_d
AC6
C116
0.1uF/16V
C0201
U1E
RK3399
GPIO1_C0/SPI3_TXD/I2C0_SCL_u
N30
GPIO1_B7/SPI3_RXD/I2C0_SDA_u
M26
GPIO1_C1/SPI3_CLK_d
M27
GPIO1_C2/SPI3_CSn0_u
N31
GPIO1_C3/PWM2_d
M28
GPIO1_C4/I2C8_SDA_u
M29
GPIO1_C5/I2C8_SCL_u
M30
GPIO1_C6/TCPD_VBUS_SOURCE0_d
L25
GPIO1_C7/TCPD_VBUS_SOURCE1_d
M31
GPIO1_D0/TCPD_VBUS_SOURCE2_d
L26
DFTJTAG_TMS_u
AA24
DFTJTAG_TRSTn_d
AB24
PMUIO2_VDDPST
N23
PMUIO2_VDD
P23
GPIO1_A0/ISP0_SHUTTER_EN/ISP1_SHUTTER_EN/TCPD_VBUS_SINK_EN_d
R25
GPIO1_A1/ISP0_SHUTTER_TRIG/ISP1_SHUTTER_TRIG/TCPD_CC0_VCONN _EN_d
T31
GPIO1_A2/ISP0_FLASHTRIGIN/ISP1_FLASHTRIGIN/TCPD_CC1_VCONN_EN_d
R26
GPIO1_A3/ISP0_FLASHTRIGOUT/ISP1_FLASHTRIGOUT_d
R27
GPIO1_A4/ISP0_PRELIGHT_TRIG/ISP1_PRELIGHT_TRIG_d
R28
GPIO1_A5/AP_PW ROFF_d
R30
GPIO1_A6/TSADC_INT_z
P26
GPIO1_A7/SPI1_RXD/UART4_RX_u
P27
GPIO1_B0/SPI1_TXD/UART4_TX_u
R31
GPIO1_B1/SPI1_CLK/PMCU_JTAG_TCK_u
P28
GPIO1_B2/SPI1_CSn0/PMCU_JTAG_TMS_u
P29
GPIO1_B3/I2C4_SDA_u
P31
GPIO1_B4/I2C4_SCL_u
P30
GPIO1_B5_d
M24
GPIO1_B6/PW M3B_IR_d
M25
C122
0.1uF/16V
C0201
R313 NC/2.2K R0402
U1I
RK3399
GPIO3_C1/MAC_TXCLK/UART3_RTSn_u
E28
GPIO3_C0/MAC_COL/UART3_CTSn/SPDIF_TX_u
D27
GPIO3_B7/MAC_CRS/CIF_CLKOUTB/UART3_TX_u
B27
GPIO3_B6/MAC_RXCLK/UART3_RX_u
F25
GPIO3_B5/MAC_MDIO/UART1_TX_u
G26
GPIO3_B4/MAC_TXEN/UART1_RX_u
H22
GPIO3_B3/MAC_CLK/I2C5_SCL_u
G24
GPIO3_B2/MAC_RXER/I2C5_SDA_u
F23
GPIO3_B1/MAC_RXDV_d
C27
GPIO3_B0/MAC_MDC/SPI0_CSn1_u
E29
GPIO3_A7/MAC_RXD1/SPI0_CSn0_u
F27
GPIO3_A6/MAC_RXD0/SPI0_CLK_u
E26
GPIO3_A5/MAC_TXD1/SPI0_TXD_d
G23
GPIO3_A4/MAC_TXD0/SPI0_RXD_d
D26
GPIO3_A3/MAC_RXD3/SPI4_CSn0_u
E25
GPIO3_A2/MAC_RXD2/SPI4_CLK_u
E30
GPIO3_A1/MAC_TXD3/SPI4_TXD_d
H23
GPIO3_A0/MAC_TXD2/SPI4_RXD_d
F24
APIO1_VDD
J23
APIO1_VDDPST
J22
R59 2.2K R0402
C121
0.1uF/16V
C0201
R316 2.2K R0402
R60 2.2K R0402
R627
2.2K
R0402
C119
0.1uF/16V
C0201
R53 2.2K R0402
R57 2.2K R0402
R628 2.2K R0402
R54 2.2K R0402
UART2DBG_RX
UART2DBG_TX
I2C4_SDA
I2C4_SCL
I2C_SDA_PMIC
I2C_SCL_PMIC
I2C1_SDA_1V8
I2C1_SCL_1V8
I2C3_SDA
I2C3_SCL
TP_RST
TP_INT
UART2DBG_RX
UART2DBG_TX