User manual

LPCXpresso Experiment Kit - User’s Guide
Page 104
Copyright 2013 © Embedded Artists AB
Have a look in chapter 13 - LPC111x/LPC11Cxx UART in the LPC111x user’s manual for a description
of the how the UART block works. The basic principles are the same as for the SPI block – it is a serial
shift register for transmitting and receiving. The difference is that for the UART block it is more complex
with for example separate shift registers for transmitting and receiving and more flexibility in setting the
bit rates. Some features like auto-flow control, auto-baud, modem signaling and RS-485 functionality
will not be covered by these experiments.
The transmit signal (TXD) is available on pin PIO1_7 (signal GPIO_5-TXD in the schematic) and the
receive signal (RXD) is available on pin PIO1_6 (signal GPIO_6-RXD in the schematic).
Below are some functions to get the UART functionality started. The UARTInit() function will
initialize the pin-muxing, enable the UART peripheral, setup the bit rate and empty the FIFO:s.
#include "LPC11xx.h"
#include "uart.h"
#define LSR_RDR 0x01
#define LSR_OE 0x02
#define LSR_PE 0x04
#define LSR_FE 0x08
#define LSR_BI 0x10
#define LSR_THRE 0x20
#define LSR_TEMT 0x40
#define LSR_RXFE 0x80
/*****************************************************************************
** Function name: UARTInit
**
** Descriptions: Initialize UART0 port, setup pin select,
** clock, parity, stop bits, FIFO, etc.
**
** parameters: UART baudrate
** Returned value: None
**
*****************************************************************************/
void UARTInit(uint32_t baudrate)
{
uint32_t Fdiv;
uint32_t regVal;
LPC_IOCON->PIO1_6 &= ~0x07; /* UART I/O config */
LPC_IOCON->PIO1_6 |= 0x01; /* UART RXD */
LPC_IOCON->PIO1_7 &= ~0x07;
LPC_IOCON->PIO1_7 |= 0x01; /* UART TXD */
/* Enable UART clock */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
LPC_SYSCON->UARTCLKDIV = 0x1; /* divided by 1 */
LPC_UART->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
regVal = LPC_SYSCON->UARTCLKDIV;
Fdiv = (((SystemCoreClock/LPC_SYSCON->SYSAHBCLKDIV)/regVal)/16)/baudrate;
LPC_UART->DLM = Fdiv / 256;
LPC_UART->DLL = Fdiv % 256;
LPC_UART->LCR = 0x03; /* DLAB = 0 */
LPC_UART->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
/* Read to clear the line status. */
regVal = LPC_UART->LSR;
/* Ensure a clean start, no data in either TX or RX FIFO. */
while ( (LPC_UART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
while ( LPC_UART->LSR & LSR_RDR )
{
regVal = LPC_UART->RBR; /* Dump data from RX FIFO */
}
return;
}
/*****************************************************************************