User manual

LPCXpresso Experiment Kit - User’s Guide

Page 72

7.11 PWM via a Timer

In previous experiment PWM signals have been generated via software. In this experiment you will

learn how to work with a timer to generate PWM signals via hardware. It will free up the microcontroller

for other tasks since the hardware operates without continuous software control once initialized.

In section 7.7 - Pulse Width Modulation, the principles for a PWM signal were presented. The signal

has a cycle period (D, frequency = 1/D) and a duty cycle (d/D), which is the fraction of the cycle the

signals is high (0-1, 0-100%).

Have a look in chapter 18 -16-bit counter/timer CT16B0/1 in the LPC111x user’s manual for a

description of the how the 16-bit timers works. Note that chapter 19 describes the same timer for the

LPC1115 (the XL device family) but for our purposes the timers are identical in the LPC111x family.

From earlier experiments we know that a timer can be quite complicated since it can be used for many

different functions. The principle to use a timer to generate a PWM signal is as follows:

1. Setup the timer to count up from zero to a match value. This value is the cycle period (D). The

value is calculated as “cycle period” / “count clock period”.

2. The counter counts up to this match value (cycle period value) and then restarts from zero.

This repeats for as long as the timer is enabled.

3. Setup a match value, which represents the duty cycle (d/D).

4. When the cycle period counter restarts from zero the PWM output signal is set low. When the

cycle period counter match the match register, the PWM output signal is set high.

As seen, there are two separate steps for creating a PWM signal. The first is to create a cycle period

and the second is to create the duty cycle. The cycle period is typically fixed throughout the application

execution time and is a design parameter. The duty cycle is, on the other hand, something that

typically changes during the application execution time.

If the cycle period is not so critical, just “high-enough”, then a suitable value for the period register can

be 100. The resolution on the duty cycle is then 1% (100 steps). The match register is set to a value

between 0 and 100. If higher resolution on the PWM signal is needed the cycle period can for example

be set to 1000. Then the resolution is 0.1%.

In general it is no problem to have any value in the period register. The value in the match register is

calculated like this (assuming 0-100% duty cycle as input parameter):

Match register = (Cycle register value * (100 – wanted duty cycle)) / 100

Note the term (100- wanted duty cycle). This is because the PWM signal starts each period as low and

is set when a match occurs.

We will work with 16-bit timer #1 to generate two PWM signals. The MAT0 and MAT1 signals are

pinned out and will be our PWM signals. In the LPC111x user’s manual, chapter 18 we find the

following important sentence: “In PWM mode, three match registers on CT16B0 and two match

registers on CT16B1 can be used to provide a single-edge controlled PWM output on the match output

pins. It is recommended to use the match registers that are not pinned out to control the PWM cycle

length.” Since MAT0 and MAT1 of 16-bit timer #1 is pinned out and used as external PWM signals we

select match register 2 as the cycle period register.

The subroutines below implements the principles outlined above. Study the code and read in the user’s

manual to understand how the code works and in what way the timer is used to generate the two PWM

signals.

/*****************************************************************************

** Function name: initPWM

** Descriptions: Initialize 16-bit timer #1 for PWM generation