User manual

LPCXpresso Experiment Kit - User’s Guide

Page 78

7.12 Work with a Serial Bus – SPI

In this experiment you will learn how to work with the Serial Peripheral Interface Bus, or SPI bus for

short. It is a synchronous bus meaning that there is an explicit clock signal. SPI builds on the master-

slave concept where one unit is a master and controls the communication. The other end is the slave.

Four signals are needed for communication in both directions:

 SCLK: serial clock, driven from the master

 MOSI: data signal, Master Output, Slave Input, driven from the master

 MISO: data signal, Master Input, Slave Output, driven from the slave

 SSEL or SS: Slave Select, driven from the master

Many slaves can co-exist if there are many slave select (SSEL) signals, see picture below.

Figure 46 – SPI Master and many Slaves

The protocol defines four different modes (0-3), which have to do with which SCLK edge the data is

clocked on (rising or falling) and the SCLK inactive state (high or low). Mode 0 will work fine for the SPI

experiments in this section.

The master and slave connects the shift registers in a ring, see picture below. The shift registers are 8

bits long in the picture but in principle they can be other lengths also. 12-bit and 16-bit lengths are also

commonly used. The most significant bit (MSB) is typically sent first on the MOSI/MISO data lines.

Note that this structure results in that the master receives one byte from the slave when one byte is

sent.

Figure 47 – SPI Master and Slave Connection