User manual

LPCXpresso Experiment Kit - User’s Guide

Page 84

Figure 52 –25LC080 Page Write Sequence

The 25LC080 chip contains a write enable latch. This latch must be set before any write operations are

allowed. The WREN instruction sets the latch, i.e., enable a write operation. The WRDI operation

resets the latch, i.e., block write operations. Note that the write enable bit must the set before every

write operations. It is automatically reset after a successful write operation.

The WREN and WRDI instructions have no parameters. They are just one-byte instructions send to the

25LC080 chip. Note that the SSEL/CS signal must be brought high after the transmissions in order for

the instructions to be actually executed. The WREN instruction is shown in the picture below. The

WRDI instruction is similar and not shown.

Figure 53 –25LC080 Write Enable Sequence

There is also a status register. It can be read at any time, even during a write operation. It is possible

to check the status of a write operation and detect when it is ready. It is also possible to read the write

enable latch state as well as controlling write protection of blocks of the memory region. Read the

datasheet for details.

Study the code below. It contains an initial framework for reading and writing to the 25LC080 chip.

/* SPI E2PROM command set */

#define INST_WREN 0x06 /* MSB A8 is set to 0, simplifying test */

#define INST_WRDI 0x04

#define INST_RDSR 0x05

#define INST_WRSR 0x01

#define INST_READ 0x03

#define INST_WRITE 0x02