Circuit diagram

GND
FTSH-110-01-L-DV
1X09
PMEG1020EA
GND
FTSH-105-01-L-DV
GND
74LVC1G07DCK
GND
GND GND
GND
GND
100n
GND
GND
10u 100n
100n100n
GND
GND GND
100R
100R
100R
100R
100K
100K
100K
100K
100K
100K
GND
74LVC8T245PW
74LVC2T45DC
0R
2k22k2
GND
GND
UL
100K
100K
74LVC1T45GW
74LVC1T45GW
100K
100K
100R
1 2
J8
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
1
2
3
J6
9
4
5
6
7
8
D4
1 2
J7
3 4
5 6
7 8
9 10
2 4
U5
3 5
U5P
GND VCC
3 1
SJ1
2
C7
C32 C31
C42C30
R51
R49
R17
R18
R19
R20
R21
R22
R23
R24
A1
3
DIR
2
VCC_A
1
VCC_B
24
GND
13
B1
21
U4
A2
4
B2
20
OE
22
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
B8
14
B7
15
B6
16
B5
17
B4
18
B3
19
GND
11
GND
12
VCC_B
23
A1
2
DIR
5
VCC_A
1
VCC_B
8
GND
4
B1
7
U3
A2
3
B2
6
R46
R52R47
12
JP2
R38
R50
R48
A
3
DIR
5
VCC_A
1
VCC_B
6
GND
2
B
4
U7
A
3
DIR
5
VCC_A
1
VCC_B
6
GND
2
B
4
U6
R56
R57
R58
VIO_3V3
VIO_3V3
VIO_3V3
VIO_3V3
VIO_3V3
VIO_3V3
JTAG_TMS_SWDIO
JTAG_TMS_SWDIO
JTAG_TMS_SWDIO
JTAG_TCK_SWCLK
JTAG_TCK_SWCLK
JTAG_TCK_SWCLK
TRACEDATA3
TRACEDATA3
TRACEDATA2
TRACEDATA2
TRACEDATA1
TRACEDATA1
TRACEDATA0
TRACEDATA0
JTAG_TDO_SWO
JTAG_TDO_SWO
JTAG_TDO_SWO
JTAG_TDI
JTAG_TDI
JTAG_TDI
JTAG_RESET
JTAG_RESET
JTAG_RESET
VIO_3V3ZZ
VIO_3V3Z
EXT_POW
ISP_CTRL ISP_CTL_OD
ISP_CTL_OD
JTAG_VREF
VIO_BUF_B
VIO_BUF_B
VIO_BUF_B
VIO_BUF_B
VIO_BUF_B
VIO_BUF_B
VIO_BUF_B
VIO_BUF_B
SGPIO14_TMS_SWDIO
SGPIO15_TMS_SWDIO_TXEN
GPIO5_5_JTAG_RESET
GPIO5_6_JTAG_RESET_TXEN
SGPIO11_TCK_SWCLK
SGPIO12_JTAG_TDI
TRACECLK_RTCK
TRACECLK_RTCK
SGPIO2_SGPIO6_TRACEDATA2
SGPIO3_SGPIO7_TRACEDATA3
SGPIO10_TDO_SWO
SGPIO0_SGPIO4_TRACEDATA0
SGPIO8_TRACECLK_RTCK
SGPIO1_SGPIO5_TRACEDATA1
SGPIO_9_BUF
SGPIO_13_BUF
SGPIO_9
SGPIO_13
DIR_U4
DIR_U3
NXP Semiconductors
JTAG/SWD/TRACE Interface
J6 Not installed
JP2 open - Target supplied JTAG_VREF
JP2 closed - Target powered by JTAG_VREF