Instruction manual

1-6 / Introduction ControlWaveLP
Halt system into low power mode
Programmable Clock Divider
FLASH Controller
Integrated real-time clock (with battery backup)
Complete set of PC functions
• 512 Kbytes FLASH BIOS, 29LV040, 8-bit
• 2 Mbytes SRAM, 3.3V, 512K x 8, 70 nS, soldered down
• 4 Mbytes FLASH RFA soldered down
• Five (5) 9-wire PC/AT compatible serial communication ports (COM1 through
COM5). COM3 is DIP Switch configurable for RS-232 or RS-485 operation.
• One (1) 10base-T Ethernet Port (Optional) via RJ-45 connector J19
Figure 1-4 shows the basic CPU Board (configuration hardware) and Figure 1-5 provides
the system block diagram. The shaded components of Figure 1-5 are optional features that
have been designed into the CPU (but aren’t offered with the basic ControlWaveLP).
Figure 1-5 - Block Diagram of ControlWaveLP CPU Board