Instruction manual

2-20 / Installation CI-ControlWaveLP
Figure 2-17 - Analog Input (Internal Current Source) Field Wiring (AI1 Shown)
2.4.4 High Speed Counter Inputs (see Figures 2-18 through 2-22)
Figure 2-18 - HSC Input Terminal Block TB4 - LEDs & Configuration Jumpers
The high speed counter circuitry consists of signal conditioning circuitry, 16 bit ac-
cumulators, and control circuitry. The signal condition circuitry includes optocouplers,
debounce circuitry and bandwidth limit circuitry. Individual debounce circuitry is provided
for each of the four HSC inputs. Individual debounce circuits are enabled when their
associated debounce jumper is installed. The debounce jumper must be installed when
wiring field devices to the HSCSET and HSCRESET input terminals.
Each counter is assigned three field inputs, SET, RESET and COMMON. When the
debounce circuitry is enabled a change of state on both the SET and RESET inputs is