Specifications

Computer Architecture and Maintenance (G-Scheme-2014)
This type of SDRAM is slower than the DDR variants, because only one word of data
is transmitted per clock cycle (single data rate). But this type is also faster than its
predecessors EDO-RAM and FPM-RAM which took typically 2 or 3 clocks to transfer
one word of data.
DDR-1 SDRAM
While the access latency of DRAM is fundamentally limited by the DRAM array,
DRAM has very high potential bandwidth because each internal read is actually a row
of many thousands of bits. To make more of this bandwidth available to users, a double
data rate interface was developed. This uses the same commands, accepted once per
cycle, but reads or writes two words of data per clock cycle. The DDR interface
accomplishes this by reading and writing data on both the rising and falling edges of
the clock signal. In addition, some minor changes to the SDR interface timing were
made in hindsight, and the supply voltage was reduced from 3.3 to 2.5 V. As a result,
DDR SDRAM is not backwards compatible with SDR SDRAM.
DDR SDRAM (sometimes called DDR1 for greater clarity) doubles the minimum read
or write unit; every access refers to at least two consecutive words.
Typical DDR SDRAM clock rates are 133, 166 and 200 MHz (7.5, 6, and 5 ns/cycle),
generally described as DDR-266, DDR-333 and DDR-400 (3.75, 3, and 2.5 ns per bit).
Corresponding 184-pin DIMMs are known as PC-2100, PC-2700 and PC-3200.
Features of DDR-1
i. 184 pin module
ii. Speed – 100Mhz , 133 Mhz , 166Mhz , 200Mhz
iii. Operating voltage 2.5v
iv. Synchronous Architecture
v. It prefetches 2 bits at a time
vi. Its is Double faster then SDRAM
Prepared By – Prof. Manoj.kavedia (9860174297 – 9324258878 ) (www.kavediasir.yolasite.com)
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