User's Manual

OSC (O)

“Oscillator” (OSC) is a high-speed clock with a 70-nanosecond period

(14.31818 MHz). This signal is not synchronous with the system clock.

It has a 50% duty cycle.

OWS (I)

The “Zero Wait State” (OWS) signal tells the microprocessor that it can

complete the present bus cycle without inserting any additional wait

cycles. In order to run a memory cycle to a 16-bit device without wait

cycles, “OWS” is derived from an address decode gated with a Read

or Write command. In order to run a memory cycle to an 8-bit device

with a minimum of two wait states, “OWS” should be driven active one

system clock after the Read or Write command is active gated with the

address decode for the device. Memory Read and Write commands to

an 8-bit device are active on the falling edge of the system clock.

“OWS” is active low and should be driven with an open collector or

tri-state driver capable of sinking 20 mA.

Chapter 6: Appendix