Service manual

Operating Principle
EPL-56(X?/ActionLaaer 16(M Service Mi#nua!
2.2.1.3 Interrupt Control
The ASIC E05A93 determines the priority level of the interrupt and outputs it to terminals IRLO -
IRL3. Then an interrupt is sent to the CPU. When the
IRLO-3 value is llllb, the CPU process is a
non-maskable interrupt process. When the
IRLO-3 value is OOOOb, the CPU process is a standard
process. When the IRLO-3 is any other value, the CPU process is a maskable interrupt process.
2.2.1.4 DRAM Management
The video controller uses DRAMs for the system RAM and for the V-RAM.
In this printer, a standard four 512K x 8 DRAMs are mounted in locations IC20, IC19, IC17, and
IC16, providing a total of 2.0 MB. SIMM sockets number 1 (CN8) and number 2 (CN9) are optional
SIMM sockets. These SIMM sockets can use 1,2,4,8,16,32 MB SIMM (32-bit bus).
The DRAMs (including optional SIMMS) are managed by the ASIC E05A91. The ASIC E05A91
handles the management.
The
E05A91 outputs MAO-10 (memory address), ItAS/CAS, and WE
signals
<
RAS3,4
RAS1 ,2
RASO
DWE
E05A91
(IC9)
CASO,l ,2,3
MAO-10
I
I
T T 1
L---!
DRAM
(IC20)
a
DRAM
(IC19)
1
DRAM
(IC17)
c1
DRAM
(IC16)
SIMM
slot 1
(CN8)
I
SIMM
slot 2
(CN9)
& &
J
A .
CPU DATA BUS
. a -
Figure 2-40. DRAM Management
2-20
Rev. A