User`s manual

4: INTERFACING TO THE MOTOROLA MPC821 MICROPROCESSOR

APPLICATION NOTES (S19A-G-005-05) EPSON 5-25

If an error occurs, TEA (Transfer Error Acknowledge) is asserted and the bus cycle is aborted. The

peripheral device may assert TEA, for example, if a parity error was detected; or the MPC821’s bus

controller may assert TEA itself if no peripheral device responds at the addressed memory location

within a bus time-out period.

If the transfer size is 32 bits, then all data lines (D0:31) are used in the transfer, and the two low-

order address lines A30 and A31 are ignored. If the transfer is 16 bits, data lines D0 through D15

are used, and address line A30 is ignored. For an 8-bit transfer, data lines D0–D7 and all address

lines are used.

Burst Cycles

Burst memory cycles are used to ﬁll on-chip cache memories, and for certain on-chip DMA opera-

tions. They are very similar to normal bus cycles, except that burst cycles:

• Are always 32 bits in width.

• Always attempt to transfer four 32-bit words sequentially.

• Always address longword-aligned memory (i.e. A30 and A31 are always 0:0).

• Do not increment address bits A28 and A29 between successive transfers; the addressed device

must increment these address bits internally.

If a peripheral is not capable of supporting burst cycles, it can assert Burst Inhibit (BI

) simulta-

neously with TA, and the processor will revert to normal bus cycles for the remaining data transfers.

Since burst cycles are mainly intended to facilitate cache line ﬁll from program or data memory, they

are typically not used for transfers to or from IO peripheral devices such as the S1D13504, and the

interfaces described in this document do not attempt to support these bus cycles. However, it makes

sense to include circuitry to detect the assertion of BDIP and respond with BI, in case caching is

accidently enabled for the S1D13504 address space; this support is included in the example inter-

faces.

1. This assumes that the Power PC core is operating in big endian mode, which is the typical case for embedded

systems.