User`s manual

CONTENTS
1-iv
EPSON
S1D13504 SERIES HARDWARE FUNCTIONAL
SPECIFICATION (X19A-A-002-17)
List of Figures
Figure 3-1 Typical System Diagram – SH-3 Bus, 1Mx16 FPM/EDO-DRAM......................................... 1-4
Figure 3-2 Typical System Diagram – MC68K Bus 1, 1Mx16 FPM/EDO-DRAM (16-Bit MC68000)..... 1-4
Figure 3-3 Typical System Diagram – MC68K Bus 2, 256Kx16 FPM/EDO-DRAM (32-Bit MC68030) . 1-5
Figure 3-4 Typical System Diagram – Generic Bus, 1Mx16 FPM/EDO-DRAM .................................... 1-5
Figure 4-1 System Block Diagram Showing Datapaths ........................................................................ 1-6
Figure 5-1 Pinout Diagram of S1D13504F00A...................................................................................... 1-7
Figure 5-2 Pinout Diagram of S1D13504F01A...................................................................................... 1-8
Figure 5-3 Pinout Diagram of S1D13504F02A...................................................................................... 1-9
Figure 7-1 SH-3 Interface Timing ........................................................................................................ 1-20
Figure 7-2 SH-3 Write Bus Timing....................................................................................................... 1-21
Figure 7-3 MC68000 Bus 1 InterfaceTiming ....................................................................................... 1-22
Figure 7-4 MC68000 Read Bus Timing............................................................................................... 1-23
Figure 7-5 MC68030 Bus 2 Interface Timing ...................................................................................... 1-24
Figure 7-6 MC68030 Read Bus Timing............................................................................................... 1-25
Figure 7-7 Generic MPU Interface Synchronous Timing..................................................................... 1-26
Figure 7-8 Generic Write Bus Synchronous Timing ............................................................................ 1-27
Figure 7-9 Generic MPU Interface Asynchronous Timing................................................................... 1-28
Figure 7-10 Generic Write Bus Asynchronous Timing .......................................................................... 1-29
Figure 7-11 Clock Input Requirements.................................................................................................. 1-30
Figure 7-12 EDO-DRAM Read Timing .................................................................................................. 1-31
Figure 7-13 EDO-DRAM Write Timing .................................................................................................. 1-32
Figure 7-14 EDO-DRAM Read-Write Timing......................................................................................... 1-33
Figure 7-15 EDO-DRAM CAS Before RAS Refresh Timing.................................................................. 1-34
Figure 7-16 EDO-DRAM Self-Refresh Timing....................................................................................... 1-34
Figure 7-17 FPM-DRAM Read Timing .................................................................................................. 1-35
Figure 7-18 FPM-DRAM Write Timing................................................................................................... 1-36
Figure 7-19 FPM-DRAM Read-Write Timing......................................................................................... 1-37
Figure 7-20 FPM-DRAM CAS# Before RAS# Refresh Timing.............................................................. 1-38
Figure 7-21 FPM-DRAM CBR Self-Refresh Timing .............................................................................. 1-38
Figure 7-22 LCD Panel Power On / Reset Timing ................................................................................ 1-39
Figure 7-23 LCD Panel Suspend Timing............................................................................................... 1-40
Figure 7-24 Single Monochrome 4-Bit Panel Timing............................................................................. 1-41
Figure 7-25 Single Monochrome 4-Bit Panel A.C. Timing..................................................................... 1-42
Figure 7-26 Single Monochrome 8-Bit Panel Timing............................................................................. 1-43
Figure 7-27 Single Monochrome 8-Bit Panel A.C. Timing..................................................................... 1-44
Figure 7-28 Single Color 4-Bit Panel Timing ......................................................................................... 1-45
Figure 7-29 Single Color 4-Bit Panel A.C. Timing ................................................................................. 1-46
Figure 7-30 Single Color 8-Bit Panel Timing (Format 1) ....................................................................... 1-47
Figure 7-31 Single Color 8-Bit Panel A.C. Timing (Format 1) ............................................................... 1-48
Figure 7-32 Single Color 8-Bit Panel Timing (Format 2) ....................................................................... 1-49
Figure 7-33 Single Color 8-Bit Panel A.C. Timing (Format 2) ............................................................... 1-50
Figure 7-34 Single Color 16-Bit Panel Timing ....................................................................................... 1-51
Figure 7-35 Single Color 16-Bit Panel A.C. Timing ............................................................................... 1-52
Figure 7-36 Dual Monochrome 8-Bit Panel Timing ............................................................................... 1-53
Figure 7-37 Dual Monochrome 8-Bit Panel A.C. Timing ....................................................................... 1-54
Figure 7-38 Dual Color 8-Bit Panel Timing............................................................................................ 1-55
Figure 7-39 Dual Color 8-Bit Panel A.C. Timing.................................................................................... 1-56
Figure 7-40 Dual Color 16-Bit Panel Timing.......................................................................................... 1-57