Data Sheet

Beijing Eswin Technology Co.,Ltd
• Dynamic branch prediction
• 16/32/64/128-entry BTB
• Return address stack
• 2/4 entries
• Vector interrupts for internal/external interrupt controller
• 2/6/10/16/24/32 hardware vector interrupt signals
• Fixed/Programmable interrupt level
• Edge/Level interrupt trigger type
• 2/3 HW-level nested interruption
• Address space up to 4GB
• Radix-4 divider support
• HW stack protection support
• Processor Status bus support
• PowerBrake support
2.2.2 Internal Memory
TR6260 ’s internal memory includes:
• RAM
• ROM
• bits of eFuse
2.2.3 External Flash and SRAM
TR6260 supports 1MB or 2MB external QSPI Flash
2.3 Timers and Watchdogs