Datasheet

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74AC244, 74ACT244 — Octal Buffer/Line Driver with 3-STATE Outputs

74AC244, 74ACT244 Rev. 1.4.0

January 2008

74AC244, 74ACT244

Octal Buffer/Line Driver with 3-STATE Outputs

Features

■

and I

reduced by 50%

■

3-STATE outputs drive bus lines or buffer memory

address registers

■

Outputs source/sink 24mA

■

ACT244 has TTL-compatible inputs

General Description

The AC/ACT244 is an octal buffer and line driver

designed to be employed as a memory address driver,

clock driver and bus-oriented transmitter/receiver which

provides improved PC board density.

Ordering Information

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

Order Number

Package

Number Package Description

74AC244SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74AC244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74AC244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

74AC244PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

74ACT244SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

74ACT244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74ACT244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74ACT244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

74ACT244PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

Summary of content (12 pages)

PAGE 1
74AC244, 74ACT244 Octal Buffer/Line Driver with 3-STATE Outputs Features General Description ■ ICC and IOZ reduced by 50% ■ 3-STATE outputs drive bus lines or buffer memory The AC/ACT244 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus-oriented transmitter/receiver which provides improved PC board density.
PAGE 2
Logic Symbol IEEE/IEC Pin Description Pin Names Description OE1, OE2 3-STATE Output Enable Inputs I0–I7 Inputs O0–O7 Outputs Truth Tables Inputs Outputs OE1 In (Pins 12, 14, 16, 18) L L L L H H H X Z Inputs Outputs OE2 In (Pins 3, 5, 7, 9) L L L L H H H X Z X = Immaterial Z = High Impedance ©1988 Fairchild Semiconductor Corporation 74AC244, 74ACT244 Rev. 1.4.0 www.fairchildsemi.
PAGE 3
Symbol VCC IIK Parameter Rating −0.5V to +7.0V Supply Voltage DC Input Diode Current VI = −0.5V −20mA VI = VCC + 0.5 +20mA VI DC Input Voltage −0.5V to VCC + 0.5V IOK DC Output Diode Current VO = −0.5V −20mA VO = VCC + 0.5V +20mA VO DC Output Voltage −0.5V to VCC + 0.
PAGE 4
Symbol Parameter VCC (V) VIH Minimum HIGH Level Input Voltage 3.0 Maximum LOW Level Input Voltage 3.0 Minimum HIGH Level Output Voltage 3.0 4.5 Conditions VOUT = 0.1V or VCC − 0.1V 5.5 VIL 4.5 TA = −40°C to +85°C Typ. Guaranteed Limits Units 1.5 2.1 2.1 2.1 2.25 3.15 3.15 3.15 2.75 3.85 3.85 3.85 1.5 0.9 0.9 0.9 2.25 1.35 1.35 1.35 2.75 1.65 1.65 1.65 IOUT = −50µA 2.99 2.9 2.9 2.9 4.49 4.4 4.4 4.4 4.5 5.5 3.0 TA = −55°C to +125°C VOUT = 0.1V or VCC − 0.
PAGE 5
TA = +25°C Symbol Parameter VCC (V) VIH Minimum HIGH Level Input Voltage 5.5 Maximum LOW Level Input Voltage VIL VOH Minimum HIGH Level Output Voltage Conditions Typ. TA = −55°C to +125°C TA =−40°C to +85°C Guaranteed Limits Units VOUT = 0.1V or VCC − 0.1V 1.5 2.0 2.0 2.0 1.5 2.0 2.0 2.0 VOUT = 0.1V or VCC − 0.1V 1.5 0.8 0.8 0.8 5.5 1.5 0.8 0.8 0.8 4.5 IOUT = −50µA 4.49 4.4 4.4 4.4 4.5 4.5 5.5 4.5 5.49 5.4 5.4 5.4 3.86 3.70 3.76 4.86 4.70 4.76 0.001 0.
PAGE 6
TA = +25°C, CL = 50pF tPHL tPZH tPZL tPHZ tPLZ TA = −40°C to +85°C, CL = 50pF VCC (V)(6) Min. Typ. Max. Min. Max. Min. Max. Units Propagation Delay, Data to Output 3.3 2.0 6.5 9.0 1.0 12.5 1.5 10.0 ns 5.0 1.5 5.0 7.0 1.0 9.5 1.0 7.5 Propagation Delay, Data to Output 3.3 2.0 6.5 9.0 1.0 12.0 2.0 10.0 5.0 1.5 5.0 7.0 1.0 9.0 1.0 7.5 Output Enable Time 3.3 2.0 6.0 10.5 1.0 11.5 1.5 11.0 5.0 1.5 5.0 7.0 1.0 9.0 1.5 8.
PAGE 7
13.00 12.60 A 11.43 20 11 B 9.50 10.65 7.60 10.00 7.40 2.25 1 PIN ONE INDICATOR 10 0.51 0.35 0.25 M 0.65 1.27 1.27 C B A LAND PATTERN RECOMMENDATION 2.65 MAX SEE DETAIL A 0.33 0.20 C 0.75 0.25 X 45° SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED (R0.10) GAGE PLANE (R0.10) 0.10 C 0.30 0.10 0.25 8° 0° A) THIS PACKAGE CONFORMS TO JEDEC MS-013, VARIATION AC, ISSUE E B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) CONFORMS TO ASME Y14.
PAGE 8
74AC244, 74ACT244 — Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions (Continued) Figure 2. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 9
74AC244, 74ACT244 — Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions (Continued) Figure 3. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 10
26.92 24.89 7.11 6.09 PIN #1 (0.97) 1.78 1.14 2.54 0.36 0.56 .001[.025] 3.43 3.17 5.33 MAX 7° TYP 7.87 7° TYP 3.55 3.17 0.38 MIN 7.62 10.92 MAX 0.20 0.35 C NOTES: Figure 4. 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice.
PAGE 11
74AC244, 74ACT244 — Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions (Continued) Figure 5. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 12
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