Datasheet

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September 2001

Revised February 2005

74ALVC08 Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs

74ALVC08

Low Voltage Quad 2-Input AND Gate

with 3.6V Tolerant Inputs and Outputs

General Description

The ALVC08 contains four 2-input AND gates. This product

is designed for low voltage (1.65V to 3.6V) V

applica-

tions with I/O compatibility up to 3.6V

The ALVC08 is fabricated with an advanced CMOS tech-

nology to achieve high-speed operation while maintaining

low CMOS power dissipation.

Features

■ 1.65V to 3.6V V

supply operation

■ 3.6V tolerant inputs and outputs

■ t

2.9 ns max for 3.0V to 3.6V V

3.2 ns max for 2.3V to 2.7V V

5.3 ns max for 1.65V to 1.95V V

■ Power-off high impedance inputs and outputs

■ Uses patented Quiet Series noise/EMI reduction

circuitry

■ Latchup conforms to JEDEC JED78

■ ESD performance:

Human body model 2000V

Machine model

250V

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

IEEE/IEC

Connection Diagram

Pin Descriptions

Quiet Series is a trademark of Fairchild Semiconductor Corporation.

Order Number Package Number Package Description

74ALVC08M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74ALVC08MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Names Description

, B

Inputs

Outputs

Summary of content (5 pages)

PAGE 1
Revised February 2005 74ALVC08 Low Voltage Quad 2-Input AND Gate with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC08 contains four 2-input AND gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V ■ 1.65V to 3.6V VCC supply operation The ALVC08 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation. ■ 3.6V tolerant inputs and outputs ■ tPD 2.
PAGE 2
74ALVC08 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Voltage (VI) Output Voltage (VO) (Note 2) Recommended Operating Conditions (Note 3) 0.5V to 4.6V 0.5V to 4.6V 0.5V to VCC 0.
PAGE 3
TA Symbol CL Parameter VCC tPHL, tPLH Propagation Delay Max 1.2 2.9 500: CL 3.3V r 0.3V Min 40qC to 85qC, RL 50 pF VCC 2.7V Min VCC 30 pF 2.5V r 0.2V 1.8V r 0.15V VCC Max Min Max Min Max 3.0 1.0 3.2 1.2 5.3 Units ns Capacitance Symbol Parameter TA Conditions CIN Input Capacitance VI CPD Power Dissipation Capacitance f 0V or VCC 10 MHz, CL 50 pF AC Loading and Waveforms 25qC Units VCC Typical 3.3 4.5 3.3 26 2.5 25 1.8 24 pF pF TABLE 1.
PAGE 4
74ALVC08 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.
PAGE 5
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.