Datasheet

©1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LCX07 Rev. 1.11.1 2
74LCX07 — Low Voltage Hex Buffer with Open Drain Outputs
Connection Diagram
Pin Assignments for SOIC, SOP, and TSSOP
Pad Assignments for DQFN
(Top Through View)
Pin Description
Logic Symbol
IEEE/IEC
Pin Names Description
A
n
Inputs
O
n
Outputs
(Bottom View)
DAP
No Connect
Note: DAP (Die Attach Pad)