Datasheet

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February 1994

Revised August 2002

74LCX16646 Low Voltage 16-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs

74LCX16646

Low Voltage 16-Bit Transceiver/Register

with 5V Tolerant Inputs and Outputs

General Description

The LCX16646 contains sixteen non-inverting bidirectional

registered bus transceivers with 3-STATE outputs, provid-

ing multiplexed transmission of data directly from the input

bus or from the internal storage registers. Each byte has

separate control inputs which can be shorted together for

full 16-bit operation.The DIR inputs determine the direction

of data flow through the device. The CPAB and CPBA

inputs load data into the registers on the LOW-to-HIGH

transition (see Functional Description).

The LCX16646 is designed for low voltage (2.5V or 3.3V)

applications with capability of interfacing to a 5V signal

environment.

The LCX16646 is fabricated with an advanced CMOS tech-

nology to achieve high speed operation while maintaining

CMOS low power dissipation.

Features

■ 5V tolerant inputs and outputs

■ 2.3V–3.6V V

specifications provided

■ 5.2 ns t

max (V

= 3.3V), 20 µA I

max

■ Power down high impedance inputs and outputs

■ Supports live insertion/withdrawal (Note 1)

■

±24 mA Output Drive (V

= 3.0V)

■ Implements patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 500 mA

■ ESD performance:

Human Body Model

> 2000V

Machine Model

> 200V

Note 1: To ensure the high-impedance state during power up or down, OE

should be tied to V

through a pull-up resistor: the minimum value or the

resistor is determined by the current-sourcing capability of the driver.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol Pin Descriptions

Order Number Package Number Package Description

74LCX16646MEA MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

74LCX16646MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Pin Names Description

Side A Inputs or 3-STATE Outputs

Side B Inputs or 3-STATE Outputs

Output Enable Inputs

CPAB

, CPBA

Clock Pulse Inputs

SAB

, SBA

Select Inputs

DIR

Direction Control Inputs

Summary of content (10 pages)

PAGE 1
Revised August 2002 74LCX16646 Low Voltage 16-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs General Description Features The LCX16646 contains sixteen non-inverting bidirectional registered bus transceivers with 3-STATE outputs, providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Each byte has separate control inputs which can be shorted together for full 16-bit operation.
PAGE 2
74LCX16646 Connection Diagram Truth Table (Note 2) Inputs OE1 DIR1 H X H X H X L H L H L H L H L L L L X L L X L L Data I/O CPAB1 CPBA1 SAB1 SBA1 H or L H or L X X X X X X X X L X X L X X H or L H = HIGH Voltage Level L = LOW Voltage Level X X X A0–7 B0–7 Input Input Output Operation Mode Isolation Clock An Data into A Register Clock Bn Data Into B Register An to Bn — Real Time (Transparent Mode) Input Output Clock An Data to A Register
PAGE 3
74LCX16646 Logic Diagrams Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.
PAGE 4
74LCX16646 Functional Description In the transceiver mode, data present at the HIGH impedance port may be stored in either the A or B register or both. The select (SABn, SBAn) controls can multiplex stored and real-time. The examples shown below demonstrate the four fundamental bus-management functions that can be performed. The direction control (DIRn) determines which bus will receive data when OEn is LOW.
PAGE 5
Symbol Parameter Value VCC Supply Voltage −0.5 to +7.0 VI DC Input Voltage −0.5 to +7.0 VO DC Output Voltage −0.5 to +7.0 Conditions Units V V Output in 3-STATE −0.5 to VCC + 0.
PAGE 6
74LCX16646 DC Electrical Characteristics Symbol Parameter (Continued) TA = −40°C to +85°C VCC Conditions (V) ICC ∆ICC Quiescent Supply Current Increase in ICC per Input Min Units Max VI = VCC or GND 2.3 − 3.6 20 3.6V ≤ VI, VO ≤ 5.5V (Note 6) 2.3 − 3.6 ±20 VIH = VCC −0.6V 2.3 − 3.6 500 µA µA Note 6: Outputs disabled or 3-STATE only. AC Electrical Characteristics TA = −40°C to +85°C, RL = 500Ω Symbol Parameter VCC = 3.3V ± 0.3V VCC = 2.7V VCC = 2.5V ± 0.
PAGE 7
4LCX16646 AC LOADING and WAVEFORMS Generic for LCX Family FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test Switch tPLH, tPHL Open tPZL, tPLZ 6V at VCC = 3.3 ± 0.3V VCC x 2 at VCC = 2.5 ± 0.2V tPZH,tPHZ GND Waveform for Inverting and Non-Inverting Functions 3-STATE Output High Enable and Disable Times for Logic Propagation Delay.
PAGE 8
74LCX16646 Schematic Diagram Generic for LCX Family www.fairchildsemi.
PAGE 9
74LCX16646 Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS56A 9 www.fairchildsemi.
PAGE 10
74LCX16646 Low Voltage 16-Bit Transceiver/Register with 5V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD56 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.