Datasheet

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BSS138K — N-Channel Logic Level Enhancement Mode Field Effect Transistor

BSS138K Rev. 1.3.0 1

May 2013

BSS138K

N-Channel Logic Level Enhancement Mode Field Effect

Transistor

Features

• Low On-Resistance

• Low Gate Threshold Voltage

• Low Input Capacitance

• Fast Switching Speed

• Low Input/Output Leakage

• Ultra-Small Surface Mount Package

• Pb Free / RoHS Compliant

• Green Compound

• ESD HBM = 2000 V as per JEDEC A114A; ESD CDM = 2000 V as per JEDEC C101C

Absolute Maximum Ratings

(1)

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-

ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-

tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The

absolute maximum ratings are stress ratings only. Values are at T

= 25°C unless otherwise noted.

Note:

1. These ratings are limiting values above which the serviceability of any semiconductor device maybe impaired.

Thermal Characteristics

Note:

2. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch. Minimum land pad size.

Package Marking and Ordering Information

Symbol Parameter Value Units

DSS

Drain-Source Voltage 50 V

GSS

Gate-Source Voltage ±12 V

D r a in C u r r e n t

Continuous 0.22

Pulsed 0.88

Operating Junction Temperature Range -55 to +150 °C

STG

Storage Temperature Range -55 to +150 °C

Symbol Parameter Value Units

Total Device Dissipation 350 mW

Derating above T

= 25°C 2.8 mW/°C

θJA

Thermal Resistance, Junction to Ambient

(2)

350 °C/W

Device Marking Device Reel Size Tape Width Quantity

SK BSS138K 7” 8 mm 3000 units

SOT - 23

Marking : SK

Summary of content (6 pages)

PAGE 1
BSS138K N-Channel Logic Level Enhancement Mode Field Effect Transistor Features • • • • • • • • • Low On-Resistance D Low Gate Threshold Voltage Low Input Capacitance Fast Switching Speed S Low Input/Output Leakage G Ultra-Small Surface Mount Package SOT - 23 Marking : SK Pb Free / RoHS Compliant Green Compound ESD HBM = 2000 V as per JEDEC A114A; ESD CDM = 2000 V as per JEDEC C101C Absolute Maximum Ratings(1) Stresses exceeding the absolute maximum ratings may damage the device.
PAGE 2
Values are at TA = 25°C unless otherwise noted Symbol Parameter Test Condition Min. Typ. Max. Units Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 10 μA BVDSS TJ Breakdown Voltage Temperature Coefficient ID = 250 μA, Referenced to 25°C Zero Gate Voltage Drain Current VDS = 50 V, VGS = 0 V 0.1 VGS = ±12 V, VDS = 0 V ±1 IDSS IGSS Gate-Body Leakage 50 V 0.11 V/°C VGS = ±10 V, VDS = 0 V ±0.5 VGS = ±5 V, VDS = 0 V ±0.
PAGE 3
2.00 VGS = 10V 4V 5V 1.5 RDS(on), (Ω) DRANI-SOURCE ON-RESISTANCE ID. DRAIN-SOURCE CURRENT(A) 2.0 3V 1.0 2V 0.5 2 4 6 8 10 6V 5V 4.5V 1.50 4V VGS = 3V 1.25 1.00 0.2 0.4 9V 8V 7V 0.75 0.0 0.0 0 1.75 0.6 10V 0.8 1.0 ID. DRAIN-SOURCE CURRENT(A) VDS. DRAIN-SOURCE VOLTAGE (V) Figure 2. On-Resistance Variation with Gate Voltage and Drain Current Figure 1. On-Region Characteristics RDS(on) (Ω) DRANI-SOURCE ON-RESISTANCE 2.5 VDS = 10V ID = 500 mA 2.0 1.5 1.0 0.
PAGE 4
BSS138K — N-Channel Logic Level Enhancement Mode Field Effect Transistor Typical Performance Characteristics (Continue) IS Reverse Drain Current, [mA] VGS = 0 V 100 o 150 C o 25 C 10 o -55 C 1 0.0 0.2 0.4 0.6 0.8 1.0 VSD, Body Diode Forward Voltage [V] Figure 7. Reverse Drain Current Variation with Diode Forward Voltage and Temperature © 2010 Fairchild Semiconductor Corporation BSS138K Rev. 1.3.0 www.fairchildsemi.
PAGE 5
BSS138K — N-Channel Logic Level Enhancement Mode Field Effect Transistor Physical Dimensions SOT-23 0.95 2.92±0.20 3 1.40 1.30+0.20 -0.15 1 2.20 2 0.60 0.37 (0.29) 0.95 0.20 1.00 A B 1.90 1.90 LAND PATTERN RECOMMENDATION SEE DETAIL A 1.20 MAX 0.10 0.00 (0.93) 0.10 C C 2.40±0.30 NOTES: UNLESS OTHERWISE SPECIFIED GAGE PLANE 0.23 0.08 A) REFERENCE JEDEC REGISTRATION TO-236, VARIATION AB, ISSUE H. B) ALL DIMENSIONS ARE IN MILLIMETERS.
PAGE 6
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