Datasheet

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN21SV04 • Rev. 1.0.3 13
FAN21SV04 — TinyBuck™ 4 A, 24 V Single-Input Integrated Synchronous Buck Regulator
Figure 31. Typical Soft-Start Timing Diagram
Startup on Pre-Bias
The regulator does not allow the low-side MOSFET to
operate in full synchronous mode until SS reaches 95%
of
V
REF
(~0.76 V). This enables the regulator to startup
on a pre-biased output and ensures that output is not
discharged during the soft-start cycle.
Protections
The converter output is monitored and protected against
extreme overload, short-circuit, over-voltage, and under-
voltage conditions.
Under-Voltage Protection
If FB remains below the under-voltage threshold for 16
consecutive clock cycles, the fault latch is set and the
converter shuts down. This protection is not active until
the internal SS ramp reaches 1.0 V during soft-start.
Over-Voltage Protection
If FB exceeds 115%
• V
REF
for two consecutive clock
cycles, the fault latch is set and shutdown occurs.
A shorted high-side MOSFET condition is detected
when SW voltage exceeds ~0.7 V while the low-side
MOSFET is fully enhanced. The fault latch is set
immediately upon detection.
The OV/UV fault conditions are not allowed to set the
fault latch during soft-start. They are active only after
T1.0 (see Figure 31).
Over-Temperature Protection
The chip incorporates an over-temperature protection
circuit that sets the fault latch when a die temperature of
about 155°C is reached. The IC is allowed to restart
when the die temperature falls below 125°C.
Auto-Restart
After a fault, the EN pin is discharged with 1 µA current
pull-down to a 1.1 V threshold before the internal 800 kΩ
pull-up is restored. A new soft-start cycle begins when
EN charges above 1.35 V.
Depending on the external circuit, the FAN21SV04 can
be configured to remain latched off or automatically
restart after a fault, as listed in Table 1.
Table 1. Fault / Restart Configurations
EN Pin Controller / Restart State
Pull to GND OFF (Disabled)
Connected to
5V_Reg with
100KΩ
No Restart – Latched OFF
Open Immediate Restart After Fault
Cap to GND
New Soft-Start Cycle After EN is
HIGH (Auto Restart Mode)
With EN left open, restart is immediate.
If auto-restart is not desired, tie the EN pin HIGH with a
logic gate to keep the 1 µA current sink from discharging
EN to 1.1 V. Figure 32 shows one method to pull up EN
to V
CC
for a latch configuration.
Figure 32. Enable Control with Latch Option
Power Good (PGOOD) Signal
PGOOD is an open-drain output that asserts LOW when
V
OUT
is out of regulation, as measured at the FB pin.
The thresholds are specified in the Electrical
Specifications section. PGOOD does not assert HIGH
until soft start is complete (T1.0) (see Figure 31).