Datasheet

FAN2500 — 100 mA CMOS LDO Regulator
© 2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN2500 Rev. 1.1.0 2
Block Diagram
Figure 1. Block Diagram
Pin Configuration
Figure 2. Pin Configuration
Pin Descriptions
Pin No. FAN2500 FAN2500-XX
1. V
IN
V
IN
2. GND GND
3. EN EN
4. ADJ BYP
5. V
OUT
V
OUT
Pin Name Pin No. Type Functional Description
ADJ 4 Input
FAN2500 Adjust
Ratio of potential divider from V
OUT
to ADJ determines output voltage
BYP 4 Passive
FAN2500-XX Bypass
Connect a 470 pF capacitor for noise reduction
EN 3 Digital Input
Enable
0: Shutdown V
OUT
1: Enable V
OUT
V
IN
1 Power In
Voltage Input
Supply voltage input
V
OUT
5Power Out
Voltage Output
Regulated output voltage
GND 2 Power Ground
FAN2500