Datasheet

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November 2013

FCH47N60NF — N-Channel SupreMOS

FRFET

MOSFET

FCH47N60NF Rev. C2

www.fairchildsemi.com

TO-247

FCH47N60NF

N-Channel SupreMOS

FRFET

MOSFET

600 V, 45.8 A, 65 mΩ

Features

• 650 V @ T

= 150

•Typ. R

DS(on)

= 57.5 mΩ

• Ultra Low Gate Charge (Typ. Q

= 240 nC)

• Low Effective Output Capacitance (Typ. C

oss(eff.)

= 420 pF)

• 100% Avalanche Tested

• RoHS Compliant

Application

• Solar Inverter

• AC-DC Power Supply

Description

The SupreMOS

MOSFET is Fairchild Semiconductor’s next

generation of high voltage super-junction (SJ) technology

employing a deep trench filling process that differentiates it from

the conventional SJ MOSFETs. This advanced technology and

precise process control provides lowest Rsp on-resistance,

superior switching performance and ruggedness. SupreMOS

MOSFET is suitable for high frequency switching power con-

verter applications such as PFC, server/telecom power, FPD TV

power, ATX power and industrial power applications. Supre-

MOS FRFET

MOSFET’s optimized body diode reverse recov-

ery performance can remove additional component and

improve system reliability.

MOSFET Maximum Ratings T

= 25

C unless otherwise noted.

*Drain current limited by maximum junction temperature.

Thermal Characteristics

Symbol Parameter FCH47N60NF Unit

DSS

Drain to Source Voltage 600 V

GSS

Gate to Source Voltage ±30 V

Drain Current

- Continuous (T

= 25

C) 45.8

- Continuous (T

= 100

C) 28.9

Drain Current - Pulsed (Note 1) 137.4 A

Single Pulsed Avalanche Energy (Note 2) 2926 mJ

Avalanche Current (Note 1) 15.3 A

Repetitive Avalanche Energy (Note 1) 3.7 mJ

dv/dt

MOSFET dv/dt 100 V/ns

Peak Diode Recovery dv/dt (Note 3) 50 V/ns

Power Dissipation

= 25

C) 368 W

- Derate Above 25

C2.94W/

, T

STG

Operating and Storage Temperature Range -55 to +150

Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds

300

Symbol Parameter FCH47N60NF Unit

θJC

Thermal Resistance, Junction to Case, Max. 0.34

C/W

θJA

Thermal Resistance, Junction to Ambient, Max. 40

Summary of content (8 pages)

PAGE 1
FCH47N60NF N-Channel SupreMOS® FRFET® MOSFET 600 V, 45.8 A, 65 mΩ Features Description o The SupreMOS® MOSFET is Fairchild Semiconductor’s next generation of high voltage super-junction (SJ) technology employing a deep trench filling process that differentiates it from the conventional SJ MOSFETs. This advanced technology and precise process control provides lowest Rsp on-resistance, superior switching performance and ruggedness.
PAGE 2
Part Number FCH47N60NF Top Mark FCH47N60NF Package TO-247 Packing Method Tube Reel Size N/A Tape Width N/A Quantity 30 units Electrical Characteristics TC = 25oC unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Unit 600 - - V - 0.
PAGE 3
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 300 500 VGS = 15V 10V 8V 6V 5V 100 ID, Drain Current[A] ID, Drain Current[A] 100 10 o 150 C o 25 C 10 o -55 C *Notes: 1. 250μs Pulse Test *Notes: 1. VDS = 20V 2. 250μs Pulse Test o 2. TC = 25 C 1 0.1 1 10 VDS, Drain-Source Voltage[V] 1 30 Figure 3. On-Resistance Variation vs.
PAGE 4
Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 3.0 RDS(on), [Normalized] Drain-Source On-Resistance BVDSS, [Normalized] Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 0.8 -100 *Notes: 1. VGS = 0V 2. ID = 1mA -50 0 50 100 150 o TJ, Junction Temperature [ C] 1.0 *Notes: 1. VGS = 10V 2. ID = 23.5A 0.5 -50 0 50 100 150 o TJ, Junction Temperature [ C] 200 50 100 10μs 40 100μs 10 ID, Drain Current [A] ID, Drain Current [A] 1.
PAGE 5
FCH47N60NF — N-Channel SupreMOS® FRFET® MOSFET IG = const. Figure 12. Gate Charge Test Circuit & Waveform VDS RG RL VDS VDD VGS VGS DUT V 10V GS 90% 10% td(on) tr t on td(off) tf t off Figure 13. Resistive Switching Test Circuit & Waveforms VGS Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms ©2011 Fairchild Semiconductor Corporation FCH47N60NF Rev. C2 5 www.fairchildsemi.
PAGE 6
FCH47N60NF — N-Channel SupreMOS® FRFET® MOSFET DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 15.
PAGE 7
FCH47N60NF — N-Channel SupreMOS® FRFET® MOSFET Mechanical Dimensions Figure 16. TO-247, Molded, 3-Lead, Jedec Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 8
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.