Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFCPF600N60Z, MOSFET

November 2013

FCP600N60Z / FCPF600N60Z — N-Channel SuperFET

II MOSFET

FCP600N60Z / FCPF600N60Z Rev. C3

www.fairchildsemi.com

FCP600N60Z / FCPF600N60Z

N-Channel SuperFET

II MOSFET

600 V, 7.4 A, 600 mΩ

Features

•650 V @ T

= 150°C

•Typ. R

DS(on)

= 510 mΩ

• Ultra Low Gate Charge (Typ. Q

= 20 nC)

• Low Effective Output Capacitance (Typ. C

oss(eff.)

= 74 pF)

• 100% Avalanche Tested

• ESD Improved Capacity

•RoHS Compliant

Applications

• LCD / LED / PDP TV and Monitor Lightning

• Solar Inverter

• AC-DC Power Supply

Description

SuperFET

II MOSFET is Fairchild Semiconductor’s brand-new

high voltage super-junction (SJ) MOSFET family that is utilizing

charge balance technology for outstanding low on-resistance

and lower gate charge performance. This technology is tailored

to minimize conduction loss, provide superior switching perfor-

mance, dv/dt rate and higher avalanche energy. Consequently,

SuperFET II MOSFET is very suitable for the switching power

applications such as PFC, server/telecom power, FPD TV

power, ATX power and industrial power applications.

Absolute Maximum Ratings T

= 25

C unless otherwise noted.

*Drain current limited by maximum junction temperature.

Thermal Characteristics

Symbol Parameter FCP600N60Z FCPF600N60Z Unit

DSS

Drain to Source Voltage 600 V

GSS

Gate to Source Voltage

- DC ±20 V

- AC (f > 1 Hz) ±30 V

Drain Current

- Continuous (T

= 25

C) 7.4 7.4*

- Continuous (T

= 100

C) 4.7 4.7*

Drain Current - Pulsed (Note 1) 22.2 22.2* A

Single Pulsed Avalanche Energy (Note 2) 135 mJ

Avalanche Current (Note 1) 1.5 A

Repetitive Avalanche Energy (Note 1) 0.89 mJ

dv/dt

MOSFET dv/dt 100

V/ns

Peak Diode Recovery dv/dt (Note 3) 20

Power Dissipation

= 25

C) 89 28 W

- Derate Above 25

C 0.71 0.22 W/

, T

STG

Operating and Storage Temperature Range -55 to +150

Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds

300

Symbol Parameter

FCP600N60Z FCPF600N60Z

Unit

θJC

Thermal Resistance, Junction to Case, Max. 1.4 4.5

C/W

θJA

Thermal Resistance, Junction to Ambient, Max. 62.5 62.5

TO-220

TO-220F

Summary of content (10 pages)

PAGE 1
FCP600N60Z / FCPF600N60Z N-Channel SuperFET® II MOSFET 600 V, 7.4 A, 600 mΩ Features Description • 650 V @ TJ = 150°C SuperFET® II MOSFET is Fairchild Semiconductor’s brand-new high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. This technology is tailored to minimize conduction loss, provide superior switching performance, dv/dt rate and higher avalanche energy.
PAGE 2
Part Number FCP600N60Z Top Mark FCP600N60Z Package TO-220 Packing Method Tube Reel Size N/A Tape Width N/A Quantity 50 units FCPF600N60Z FCPF600N60Z TO-220F Tube N/A N/A 50 units Electrical Characteristics TC = 25oC unless otherwise noted. Symbol Parameter Test Conditions Min. Typ. Max. Unit VGS = 0 V, ID = 10 mA, TJ = 25°C 600 - - VGS = 0 V, ID = 10 mA, TJ = 150°C 650 - - ID = 10 mA, Referenced to 25oC - 0.67 - V/oC VGS = 0 V, ID = 7.
PAGE 3
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 50 20 VGS = 10.0V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V ID, Drain Current[A] ID, Drain Current[A] 10 *Notes: 1. VDS = 20V 2. 250μs Pulse Test 1 10 o 25 C o o 150 C 1 -55 C *Notes: 1. 250μs Pulse Test o 2. TC = 25 C 0.4 0.2 1 10 VDS , Drain to Source Voltage [V] VDS , Drain-Source Voltage[V] 0.2 20 Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 3 4 5 8 IS, Reverse Drain Current [A] VGS = 10V 0.
PAGE 4
Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 3.0 RDS(on), [Normalized] Drain to Source On-Resistance BVDSS, [Normalized] Drain to Source Breakdown Voltage 1.15 1.10 1.05 1.00 0.95 *Notes: 1. VGS = 0V 2. ID = 10mA 0.90 0.85 -100 -50 0 50 100 150 o TJ, Junction Temperature [ C] 1.5 1.0 *Notes: 1. VGS = 10V 2. ID = 3.7A 0.5 Operation in This Area is Limited by R DS(on) *Notes: o 1.
PAGE 5
FCP600N60Z / FCPF600N60Z — N-Channel SuperFET® II MOSFET Typical Performance Characteristics (Continued) Figure 13. Transient Thermal Response Curve for FCP600N60Z o ZθJC(t), Thermal Response [ C/W] 2 1 0.5 PDM t1 0.2 0.1 t2 *Notes: 0.05 o 1. ZθJC(t) = 1.4 C/W Max. 2. Duty Factor, D= t1/t2 3. TJM - TC = PDM * ZθJC(t) 0.02 0.01 Single pulse 0.1 -5 10 -4 10 -3 -2 10 10 t1, Rectangular Pulse Duration [sec] -1 0 10 10 Figure 14. Transient Thermal Response Curve for FCPF600N60Z 0.
PAGE 6
FCP600N60Z / FCPF600N60Z — N-Channel SuperFET® II MOSFET IG = const. Figure 15. Gate Charge Test Circuit & Waveform VDS RG RL VDS VDD VGS VGS DUT V 10V GS 90% 10% td(on) tr t on td(off) tf t off Figure 16. Resistive Switching Test Circuit & Waveforms VGS Figure 17. Unclamped Inductive Switching Test Circuit & Waveforms ©2012 Fairchild Semiconductor Corporation FCP600N60Z / FCPF600N60Z Rev. C3 6 www.fairchildsemi.
PAGE 7
FCP600N60Z / FCPF600N60Z — N-Channel SuperFET® II MOSFET DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 18.
PAGE 8
FCP600N60Z / FCPF600N60Z — N-Channel SuperFET® II MOSFET Mechanical Dimensions Figure 19. TO-220, Molded, 3-Lead, Jedec Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 9
FCP600N60Z / FCPF600N60Z — N-Channel SuperFET® II MOSFET Mechanical Dimensions Figure 20. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 10
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.