Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFCPF7N60, MOSFET

November 2013

FCP7N60 / FCPF7N60 — N-Channel SuperFET

MOSFET

FCP7N60 / FCPF7N60 Rev. C1

www.fairchildsemi.com

TO-220

TO-220F

FCP7N60 / FCPF7N60

N-Channel SuperFET

MOSFET

600 V, 7 A, 600 mΩ

Features

•650 V @ T

= 150

•Typ. R

DS(on)

= 530 mΩ

• Ultra Low Gate Charge (Typ. Q

= 23 nC)

• Low Effective Output Capacitance (Typ. C

oss(eff.)

= 60 pF)

• 100% Avalanche Tested

•RoHS Compliant

Application

• LCD/LED/PDP TV

• Solar Inverter

• AC-DC Power Supply

Description

SuperFET

MOSFET is Fairchild Semiconductor’s first genera-

tion of high voltage super-junction (SJ) MOSFET family that is

utilizing charge balance technology for outstanding low on-

resistance and lower gate charge performance. This technology

is tailored to minimize conduction loss, provide superior switch-

ing performance, dv/dt rate and higher avalanche energy. Con-

sequently, SuperFET MOSFET is very suitable for the switching

power applications such as PFC, server/telecom power, FPD

TV power, ATX power and industrial power applications.

Absolute Maximum Ratings T

= 25

C unless otherwise noted.

Thermal Characteristics

Symbol Parameter FCP7N60

FCPF7N60 /

FCPF7N60YDTU

Unit

DSS

Drain-Source Voltage 600 V

Drain Current - Continuous (T

= 25°C)

- Continuous (T

= 100°C)

4.4

4.4*

Drain Current - Pulsed

(Note 1)

21 21*

GSS

Gate-Source voltage ± 30 V

Single Pulsed Avalanche Energy

(Note 2)

230 mJ

Avalanche Current

(Note 1)

Repetitive Avalanche Energy

(Note 1)

8.3 mJ

dv/dt Peak Diode Recovery dv/dt

(Note 3)

4.5 V/ns

Power Dissipation (T

= 25°C)

- Derate Above 25°C

0.67

0.25

W/°C

STG

Operating and Storage Temperature Range -55 to +150 °C

Maximum Lead Temperature for Soldering,

1/8” from Case for 5 Seconds

300 °C

Symbol Parameter FCP7N60

FCPF7N60 /

FCPF7N60YDTU

Unit

θJC

Thermal Resistance, Junction-to-Case, Max. 1.5 4.0

°C/W

θJA

Thermal Resistance, Junction-to-Ambient, Max. 62.5 62.5

*Drain current limited by maximum junction temperature.

TO-220F

Y-formed

Summary of content (11 pages)

PAGE 1
FCP7N60 / FCPF7N60 N-Channel SuperFET® MOSFET 600 V, 7 A, 600 mΩ Features • 650 V @ TJ = Description 150oC SuperFET® MOSFET is Fairchild Semiconductor’s first generation of high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low onresistance and lower gate charge performance. This technology is tailored to minimize conduction loss, provide superior switching performance, dv/dt rate and higher avalanche energy.
PAGE 2
Part Number FCP7N60 Top Mark FCP7N60 FCPF7N60 FCPF7N60YDTU Package TO220 Packing Method Tube Reel Size N/A Tape Width N/A Quantity 50 units FCPF7N60 TO220F Tube N/A N/A 50 units FCPF7N60 TO-220F (Y-formed) Tube N/A N/A 50 units Electrical Characteristics Symbol TC = 25°C unless otherwise noted. Parameter Conditions Min. Typ. Max.
PAGE 3
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics VGS Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V 1 0 10 Notes : 1. 250μs Pulse Test 2. TC = 25°C -1 10 ID , Drain Current [A] ID, Drain Current [A] 1 10 150°C 25°C 0 10 -55°C Note 1. VDS = 40V 2. 250μs Pulse Test 10 -1 -1 0 10 10 1 10 10 2 4 6 8 10 VGS , Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4.
PAGE 4
FCP7N60 / FCPF7N60 — N-Channel SuperFET® MOSFET Typical Performance Characteristics (Continued) Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 3.0 RDS(ON), (Normalized) 1.1 1.0 Notes : 1. VGS = 0 V 0.9 2. ID = 250μA Drain-Source On-Resistance BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 2.5 2.0 1.5 1.0 Notes : 1. VGS = 10 V 0.5 2. ID = 3.5 A 0.8 -100 -50 0 50 100 150 0.
PAGE 5
FCP7N60 / FCPF7N60 — N-Channel SuperFET® MOSFET Typical Performance Characteristics (Continued) 10 0 D = 0 .5 0 .2 N o te s : 1 . Z θ J C (t) = 1 .5 ° C /W M a x. 0 .1 10 -1 2 . D u ty F a c to r, D = t 1 /t 2 0 .0 5 3 . T JM - T C = P D M * Z θ J C (t) 0 .0 2 0 .0 1 PDM θJC o ZθJC Z (t), (t),Thermal ThermalResponse Response[ C/W] Figure 11-1.
PAGE 6
50KΩ 200nF 12V FCP7N60 / FCPF7N60 — N-Channel SuperFET® MOSFET VGS Same Type as DUT Qg 10V 300nF VDS VGS Qgs Qgd DUT IG = const. 3mA Charge Figure 12. Gate Charge Test Circuit & Waveform VDS RG RL VDS 90% VDD VGS VGS DUT V 10V GS 10% td(on) tr td(off) t on tf t off Figure 13. Resistive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD V 10V GS GS ID (t) VDS (t) VDD DUT tp tp Time Figure 14.
PAGE 7
FCP7N60 / FCPF7N60 — N-Channel SuperFET® MOSFET DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 15.
PAGE 8
FCP7N60 / FCPF7N60 — N-Channel SuperFET® MOSFET Mechanical Dimensions Figure 16. TO-220, Molded, 3-Lead, Jedec Variation AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 9
FCP7N60 / FCPF7N60 — N-Channel SuperFET® MOSFET Mechanical Dimensions Figure 17. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight Lead Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 10
FCP7N60 / FCPF7N60 — N-Channel SuperFET® MOSFET Mechanical Dimensions Figure 18. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Y-Formed Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 11
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.