FDB8832 N-Channel Logic Level PowerTrench® MOSFET 30V, 80A, 2.1mΩ Features Applications Typ rDS(on) = 1.5mΩ at VGS = 5V, ID = 80A Starter / Alternator Systems Typ Qg(5) = 100nC at VGS = 5V Electronic Power Steering Systems Low Miller Charge DC-DC Converters Low Qrr Body Diode UIS Capability (Single Pulse and Repetitive Pulse) AD ©2011 Fairchild Semiconductor Corporation FDB8832 Rev. A1 FREE I M ENTATIO LE N MP LE RoHS Compliant 1 www.fairchildsemi.
Symbol Drain to Source Voltage VDSS VGS ID Parameter Ratings 30 Units V Gate to Source Voltage ±20 V Drain Current Continuous (TC < 165oC, VGS = 10V) 80 Drain Current Continuous (TC < 163oC, VGS = 5V) 80 Drain Current Continuous (Tamb = 25oC, VGS = 10V, with RθJA = 43oC/W) Pulsed EAS PD A 34 See Figure 4 Single Pulse Avalanche Energy (Note 1) 1246 mJ Power Dissipation 300 W Derate above 25oC 2 W/oC TJ, TSTG Operating and Storage Temperature o -55 to +175 C Thermal Characteristic
Symbol Parameter Test Conditions Min Typ Max Units ns Switching Characteristics t(on) Turn-On Time - - 155 td(on) Turn-On Delay Time - 24 - ns tr Turn-On Rise Time - 73 - ns td(off) Turn-Off Delay Time - 54 - ns tf Turn-Off Fall Time - 38 - ns toff Turn-Off Time - - 149 ns ISD = 75A - 0.8 1.25 V ISD = 40A - 0.8 1.0 V VDD = 15V, ID = 80A VGS = 5V, RGS = 1.
350 1.0 300 ID, DRAIN CURRENT (A) POWER DISSIPATION MULIPLIER 1.2 0.8 0.6 0.4 0.2 0.0 250 VGS = 10V 200 VGS = 5V 150 100 50 0 25 50 75 100 125 150 TC, CASE TEMPERATURE(oC) 0 25 175 Figure 1. Normalized Power Dissipation vs Case Temperature 2 1 NORMALIZED THERMAL IMPEDANCE, ZθJC CURRENT LIMITED BY PACKAGE 50 75 100 125 150 TC, CASE TEMPERATURE(oC) 175 Figure 2. Maximum Continuous Drain Current vs Case Temperature DUTY CYCLE - DESCENDING ORDER D = 0.50 0.20 0.10 0.05 0.02 0.01 0.
00 IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 4000 10us 1000 100us 100 10 LIMITED BY PACKAGE 1 0.1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(on) 1 1ms SINGLE PULSE TJ = MAX RATED 10ms TC = 25oC DC 10 VDS, DRAIN TO SOURCE VOLTAGE (V) If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R ≠ 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] 100 o STARTING TJ = 25 C 10 o STARTING TJ = 150 C 1 0.01 60 0.
1.10 VGS = VDS ID = 250μA 1.2 NORMALIZED GATE THRESHOLD VOLTAGE NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.4 1.0 0.8 0.6 0.4 0.2 0.0 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE(oC) 200 10000 Coss Crss f = 1MHz VGS = 0V 50 Figure 13. Capacitance vs Drain to Source Voltage FDB8832 Rev. A1 0.95 0.90 -80 VGS, GATE TO SOURCE VOLTAGE(V) CAPACITANCE (pF) Ciss 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 1.00 -40 0 40 80 120 160 200 Figure 12.
tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.