Datasheet

FDC6506P
FDC6506P Rev. C
FDC6506P
Dual P-Channel Logic Level PowerTrench MOSFET
February 1999
1999 Fairchild Semiconductor Corporation
Absolute Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol Parameter Ratings Units
V
DSS
Drain-Source Voltage -30 V
V
GSS
Gate-Source Voltage
±
20 V
I
D
Drain Current - Continuous
(Note 1a)
-1.8 A
- Pulsed -10
P
D
Power Dissipation for Single Operation
(Note 1a)
0.96 W
(Note 1b)
0.9
(Note 1c)
0.7
T
J
, T
stg
Operating and Storage Junction Temperature Range -55 to +150
°
C
Thermal Characteristics
R
θ
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
130
°
C/W
R
θ
JC
Thermal Resistance, Junction-to-Case
(Note 1)
60
°
C/W
Package Outlines and Ordering Information
Device Marking Device Reel Size Tape Width Quantity
.
506
FDC6506P 7’’ 8mm 3000 units
5
6
4
2
3
1
General Description
These P-Channel logic level MOSFETs are produced using
Fairchild Semiconductor's advanced PowerTrench
process that has been especially tailored to minimize
on-state resistance and yet maintain low gate charge for
superior switching performance.
These devices have been designed to offer exceptional
power dissipation in a very small footprint for applications
where the bigger more expensive SO-8 and TSSOP-8
packages are impractical.
Applications
• Load switch
• Battery protection
• Power management
Features
• -1.8 A, -30 V. R
DS(on)
= 0.170 Ω @ V
GS
= -10 V
R
DS(on)
= 0.280 Ω @ V
GS
= -4.5 V
• Low gate charge (2.3nC typical).
• Fast switching speed.
• High performance trench technology for extremely
low R
DS(ON)
.
• SuperSOT
TM
-6 package: small footprint (72% smaller
than standard SO-8); low profile (1mm thick).
D1
S2
G1
D2
S1
G2
SuperSOT -6
TM