Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDC855N, MOSFET

January 2008

FDC855N Rev.C

www.fairchildsemi.com

FDC855N N-Channel, Logic Level, PowerTrench

MOSFET

FDC855N

Single N-Channel, Logic Level, PowerTrench

MOSFET

30V, 6.1A, 27mΩ

Features

 Max r

DS(on)

= 27mΩ at V

= 10V, I

= 6.1A

 Max r

DS(on)

= 36mΩ at V

= 4.5V, I

= 5.3A

 SuperSOT

-6 package: small footprint (72% smaller than

standard SO-8; low profile (1mm thick).

 RoHS Compliant

General Description

This N-Channel Logic Level MOSFET is an efficient solution for

low voltage and battery powered applications. Utilizing Fairchild

Semiconductor’s advanced PowerTrench

process, this device

possesses minimized on-state resistance to optimize the power

consumption. They are ideal for applications where in-line power

loss is critical.

Application

 Power Management in Notebook, Hard Disk Drive

MOSFET Maximum Ratings T

= 25°C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage 30 V

Gate to Source Voltage ±20 V

Drain Current -Continuous T

= 25°C (Note 1a) 6.1

-Pulsed 20

Power Dissipation (Steady State) (Note 1a) 1.6

Power Dissipation (Steady State) (Note 1b) 0.8

, T

STG

Operating and Storage Junction Temperature Range -55 to +150 °C

θJC

Thermal Resistance, Junction to Case (Note 1) 30

°C/W

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 78

Device Marking Device Package Reel Size Tape Width Quantity

.855 FDC855N SuperSOT-6 7” 8 mm 3000 units

SuperSOT

-6

Pin 1

Summary of content (6 pages)

PAGE 1
FDC855N tm ® Single N-Channel, Logic Level, PowerTrench MOSFET 30V, 6.1A, 27mΩ Features General Description Max rDS(on) = 27mΩ at VGS = 10V, ID = 6.1A This N-Channel Logic Level MOSFET is an efficient solution for low voltage and battery powered applications. Utilizing Fairchild Semiconductor’s advanced PowerTrench® process, this device possesses minimized on-state resistance to optimize the power consumption. They are ideal for applications where in-line power loss is critical.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient 30 ID = 250µA, referenced to 25°C IDSS Zero Gate Voltage Drain Current IGSS Gate to Source Leakage Current V 24 VGS = 0V, VDS = 24V, mV/°C 1 TC = 125°C µA 250 VGS = ±20V, VDS = 0V ±100 nA 3.
PAGE 3
20 4.0 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 4.5V VGS = 4.0V ID, DRAIN CURRENT (A) 16 VGS = 10V VGS = 6V 12 8 VGS = 3.5V 4 PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX 0 0 1 2 3 PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX 3.5 VGS = 3.5V 3.0 VGS = 4.0V 2.5 2.0 VGS = 4.5V 1.5 1.0 4 0 4 VDS, DRAIN TO SOURCE VOLTAGE (V) 12 16 20 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 60 ID = 6.1A VGS = 10V rDS(on), DRAIN TO 1.4 1.2 1.0 0.8 0.
PAGE 4
VGS, GATE TO SOURCE VOLTAGE(V) 10 1000 ID = 6.1A Ciss CAPACITANCE (pF) 8 VDD = 15V 6 VDD = 10V VDD = 20V 4 Coss 100 2 0 0 3 6 9 20 0.1 12 1 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE(nC) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 30 P(PK), PEAK TRANSIENT POWER (W) 100 100µs 10 ID, DRAIN CURRENT (A) Crss f = 1MHz VGS = 0V 1ms 1 10ms THIS AREA IS LIMITED BY rDS(on) 100ms SINGLE PULSE TJ = MAX RATED 0.
PAGE 5
FDC855N N-Channel, Logic Level, PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2008 Fairchild Semiconductor Corporation FDC855N Rev.C 5 www.fairchildsemi.
PAGE 6
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