Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDD6N50FTM, MOSFET

November 2013

FDD6N50F — N-Channel UniFET

FRFET

MOSFET

FDD6N50F Rev. C1

www.fairchildsemi.com

FDD6N50F

N-Channel UniFET

FRFET

MOSFET

500 V, 5.5 A, 1.15 Ω

Features

•R

DS(on)

= 950 mΩ (Typ.) @ V

= 10 V, I

= 2.75 A

• Low Gate Charge (Typ. 15nC)

• Low C

rss

(Typ. 6.3pF)

• 100% Avalanche Tested

• Improved dv/dt Capability

• RoHS Compliant

Applications

• LCD/LED/PDP TV

• Lighting

• Uninterruptible Power Supply

• AC-DC Power Supply

Description

UniFET

MOSFET is Fairchild Semiconductor’s high voltage

MOSFET family based on planar stripe and DMOS technology.

This MOSFET is tailored to reduce on-state resistance, and to

provide better switching performance and higher avalanche

energy strength. The body diode’s reverse recovery perfor-

mance of UniFET FRFET

MOSFET has been enhanced by

lifetime control. Its trr is less than 100nsec and the reverse dv/dt

immunity is 15V/ns while normal planar MOSFETs have over

200nsec and 4.5V/nsec respectively. Therefore, it can remove

additional component and improve system reliability in certain

applications in which the performance of MOSFET’s body diode

is significant. This device family is suitable for switching power

converter applications such as power factor correction (PFC),

flat panel display (FPD) TV power, ATX and electronic lamp bal-

lasts.

D-PAK

MOSFET Maximum Ratings T

= 25

C unless otherwise noted.

Thermal Characteristics

Symbol Parameter FDD6N50F Unit

DSS

Drain to Source Voltage 500 V

GSS

Gate to Source Voltage ±30 V

D r a i n C u r r e n t

- Continuous (T

= 25

C) 5.5

- Continuous (T

= 100

C) 2.4

D r a i n C u r r e n t - P u l s e d (Note 1) 22 A

Single Pulsed Avalanche Energy (Note 2) 270 mJ

Avalanche Current (Note 1) 5.5 A

Repetitive Avalanche Energy (Note 1) 8.9 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) 20 V/ns

Power Dissipation

= 25

C) 89 W

- Derate Above 25

C0.71W/

, T

STG

Operating and Storage Temperature Range -55 to +150

Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds

300

Symbol Parameter FDD6N50F Unit

θJC

Thermal Resistance, Junction to Case, Max. 1.4

C/W

θJA

Thermal Resistance, Junction to Ambient, Max. 83

Summary of content (8 pages)

PAGE 1
FDD6N50F N-Channel UniFETTM FRFET® MOSFET 500 V, 5.5 A, 1.15 Ω Features Description • RDS(on) = 950 mΩ (Typ.) @ VGS = 10 V, ID = 2.75 A UniFETTM MOSFET is Fairchild Semiconductor’s high voltage MOSFET family based on planar stripe and DMOS technology. This MOSFET is tailored to reduce on-state resistance, and to provide better switching performance and higher avalanche energy strength. The body diode’s reverse recovery performance of UniFET FRFET® MOSFET has been enhanced by lifetime control.
PAGE 2
Part Number FDD6N50FTM Top Mark FDD6N50F Electrical Characteristics Symbol Package DPAK Packing Method Tape and Reel Reel Size 330 mm Tape Width 16 mm Quantity 2500 units TC = 25oC unless otherwise noted. Parameter Test Conditions Min. Typ. Max. Unit 500 - - V - 0.
PAGE 3
Figure 1. On-Region Characteristics 28 20 VGS = 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 10 ID,Drain Current[A] 10 ID,Drain Current[A] Figure 2. Transfer Characteristics 1 o o 150 C 25 C *Notes: 1. 250μs Pulse Test 0.1 *Notes: 1. VDS = 20V 2. 250μs Pulse Test o 2. TC = 25 C 0.04 0.1 1 VDS,Drain-Source Voltage[V] 10 1 20 Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 6 7 8 9 VGS,Gate-Source Voltage[V] IS, Reverse Drain Current [A] 100 1.8 VGS = 10V 1.
PAGE 4
Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. Maximum Safe Operating Area 50 30μs ID, Drain Current [A] BVDSS, [Normalized] Drain-Source Breakdown Voltage 1.2 1.1 1.0 100μs 10 1ms 10ms 1 Operation in This Area is Limited by R DS(on) 0.1 0.9 DC *Notes: o *Notes: 1. VGS = 0V 2. ID = 250μA 0.8 -100 -50 0 50 100 150 o TJ, Junction Temperature [ C] 1. TC = 25 C o 0.01 200 2. TJ = 150 C 3. Single Pulse 1 10 100 VDS, Drain-Source Voltage [V] 1000 Figure 9.
PAGE 5
FDD6N50F — N-Channel UniFETTM FRFET® MOSFET IG = const. Figure 11. Gate Charge Test Circuit & Waveform VDS RG RL VDS VDD VGS VGS DUT V 10V GS 90% 10% td(on) tr t on td(off) tf t off Figure 12. Resistive Switching Test Circuit & Waveforms VGS Figure 13. Unclamped Inductive Switching Test Circuit & Waveforms ©2012 Fairchild Semiconductor Corporation FDD6N50F Rev. C1 5 www.fairchildsemi.
PAGE 6
FDD6N50F — N-Channel UniFETTM FRFET® MOSFET DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 14.
PAGE 7
FDD6N50F — N-Channel UniFETTM FRFET® MOSFET Mechanical Dimensions Figure 15. TO252 (D-PAK), Molded, 3-Lead, Option AA&AB Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 8
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.