Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDFMA2P857, MOSFET

FDFMA2P857 Integrated P-Channel PowerTrench

MOSFET and Schottky Diode

FDFMA2P857 Rev.B2

www.fairchildsemi.com

FDFMA2P857

Integrated P-Channel PowerTrench

MOSFET and Schottky Diode

–20V, –3.0A, 120mΩ

Features

MOSFET

 Max r

DS(on)

= 120mΩ at V

= –4.5V, I

= –3.0A

 Max r

DS(on)

= 160mΩ at V

= –2.5V, I

= –2.5A

 Max r

DS(on)

= 240mΩ at V

= –1.8V, I

= –1.0A

Schottky:

 V

< 0.54V @ 1A

 Low profile - 0.8 mm maximum - in the new pack-

age MicroFET 2x2 mm

 RoHS Compliant

General Description

This device is designed specifically as a single package solution

for the battery charge switch in cellular handset and other ultra-

portable applications. It features a MOSFET with low on-state

resistance and an independently connected low forward voltage

schottky diode for minimum conduction losses.

The MicroFET 2x2 package offers exceptional thermal

per

formance for it’s physical size and is well suited to lin

ear

mode applications.

MOSFET Maximum Ratings

= 25°C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

DSS

Drain to Source Voltage 20 V

GSS

Gate to Source Voltage ±8 V

Drain Current -Continuous (Note 1a) –3

-Pulsed –6

Power Dissipation (Note 1a) 1.4

Power Dissipation (Note 1b) 0.7

, T

STG

Operating and Storage Junction Temperature Range –55 to +150 °C

RRM

Schottky Repetitive Peak Reverse Voltage 30 V

Schottky Average Forward Current 1 A

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 86

°C/W

θJA

Thermal Resistance, Junction to Ambient (Note 1b) 173

θJA

Thermal Resistance, Junction to Ambient (Note 1c) 86

θJA

Thermal Resistance, Junction to Ambient (Note 1d) 140

Device Marking Device Package Reel Size Tape Width Quantity

.857 FDFMA2P857 MicroFET 2x2 7’’ 8mm 3000 units

MicroFET 2x2

Pin 1

July 2014

Summary of content (8 pages)

PAGE 1
FDFMA2P857 Integrated P-Channel PowerTrench® MOSFET and Schottky Diode –20V, –3.0A, 120mΩ Features General Description MOSFET: This device is designed specifically as a single package solution for the battery charge switch in cellular handset and other ultraportable applications. It features a MOSFET with low on-state resistance and an independently connected low forward voltage schottky diode for minimum conduction losses. Max rDS(on) = 120mΩ at VGS = –4.5V, ID = –3.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = –250μA, VGS = 0V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient –20 V ID = –250μA, referenced to 25°C IDSS Zero Gate Voltage Drain Current VDS = –16V, VGS = 0V –1 μA IGSS Gate to Source Leakage Current VGS = ±8V, VDS = 0V ±100 nA –1.
PAGE 3
Notes: 1: RθJA is determined with the device mounted on a 1in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. (a) MOSFET RθJA = 86oC/W when mounted on a 1in2 pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB. (b) MOSFET RθJA = 173oC/W when mounted on a minimum pad of 2 oz copper. (c) Schottky RθJA = 86oC/W when mounted on a 1in2 pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB.
PAGE 4
VGS =-4.5V 5 -2V -2.5V -3V -3.5V -1.8V 4 3 2 -1.5V 1 0 0.0 0.5 1.0 1.5 2.0 3.0 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE -ID, DRAIN CURRENT (A) 6 2.5 VGS =-1.5V 2.5 -1.8V 2.0 -2.0V 1.5 -2.5V -3.0V 0.5 -4.5V 0 1 -VDS, DRAIN TO SOURCE VOLTAGE (V) 3 4 5 6 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 0.28 1.4 rDS(on), DRAIN TO SOURCE ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 2 -ID, DRAIN CURRENT(A) Figure 1.
PAGE 5
ID = -3A VDS= -5V 3 2 -15V -10V 1 0 500 400 Ciss 300 200 Coss 100 0 1 2 3 Qg, GATE CHARGE(nC) 4 0 0 5 Figure 7. Gate Charge Characteristics 10 100 P(PK), PEAK TRANSIENT POWER (W) RDS(ON) LIMITED 1ms 1 10ms 100ms VGS = -4.5V 0.1 1s SINGLE PULSE RθJA = 173oC/W 10s DC TA = 25oC 0.01 0.1 1 10 Crss 4 8 12 16 -VDS, DRAIN TO SOURCE VOLTAGE (V) 100 200 100 10 1 SINGLE PULSE o RθJA = 173 C/W 0.1 -4 10 -3 -2 10 IF, FORWARD CURRENT(A) 3 1 TJ = 125oC 85oC 0.01 25oC 0.
PAGE 6
NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 173 C/W 0.01 -4 10 -3 10 -2 10 -1 0 10 10 1 10 2 10 3 10 t, RECTANGULAR PULSE DURATION (s) Figure 13. Transient Thermal Response Curve FDFMA2P857 Rev.B2 6 www.fairchildsemi.
PAGE 7
FDFMA2P857 Integrated P-Channel PowerTrench® MOSFET and Schottky Diode Dimensional Outline and Pad Layout Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 8
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.