Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDFME2P823ZT, MOSFET

July 2010

FDFME2P823ZT Rev.C1

www.fairchildsemi.com

FDFME2P823ZT Integrated P-Channel PowerTrench

MOSFET and Schottky Diode

FDFME2P823ZT

Integrated P-Channel PowerTrench

MOSFET and Schottky Diode

-20 V, -2.6 A, 142 mΩ

Features

 Max r

DS(on)

= 142 mΩ at V

= -4.5 V, I

= -2.3 A

 Max r

DS(on)

= 213 mΩ at V

= -2.5 V, I

= -1.8 A

 Max r

DS(on)

= 331 mΩ at V

= -1.8 V, I

= -1.5 A

 Max r

DS(on)

= 530 mΩ at V

= -1.5 V, I

= -1.2 A

 Low profile: 0.55 mm maximum in the new package

MicroFET 1.6x1.6 Thin

 Schottky: V

< 0.57 V @ 1A

 Free from halogenated compounds and antimony oxides

 HBM ESD protection level > 1600 V (Note 3)

 RoHS Compliant

General Description

This device is designed specifically as a single package solution

for the battery charge switch in cellular handset and other

ultra-portable appliacrions. It features as MOSFET with low

on-state resistance and an independently connected low forward

voltage schottky diode for minimum condution losses.

The MicroFET 1.6x1.6 Thin package offers exceptional thermal

performance for it's physical size and is well suited to switching

and linear mode applications.

Applications

 Battery Charging

 DC-DC Conversion

MOSFET Maximum Ratings T

= 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage -20 V

Gate to Source Voltage ±8 V

Drain Current -Continuous T

= 25 °C (Note 1a) -2.6

-Pulsed -6

Power Dissipation for Single Operation T

= 25 °C (Note 1a) 1.4

Power Dissipation for Single Operation T

= 25 °C (Note 1b) 0.6

RRM

Schottky Repetitive Peak Reverse Voltage 28 V

Schottky Average Forward Current 1 A

, T

STG

Operating and Storage Junction Temperature Range (Note 4) -55 to +150 °C

θJA

Thermal Resistance, Junction to Ambient (Single Operation) (Note 1a) 90

°C/W

θJA

Thermal Resistance, Junction to Ambient (Single Operation) (Note 1b) 195

θJA

Thermal Resistance, Junction to Ambient (Single Operation) (Note 1c) 110

θJA

Thermal Resistance, Junction to Ambient (Single Operation) (Note 1d) 234

Device Marking Device Package Reel Size Tape Width Quantity

3T FDFME2P823ZT MicroFET 1.6x1.6 Thin 7 ’’ 8 mm 5000 units

BOTTOM

TOP

MicroFET 1.6x1.6 Thin

Pin 1

Summary of content (8 pages)

PAGE 1
FDFME2P823ZT Integrated P-Channel PowerTrench® MOSFET and Schottky Diode -20 V, -2.6 A, 142 mΩ Features General Description This device is designed specifically as a single package solution for the battery charge switch in cellular handset and other ultra-portable appliacrions. It features as MOSFET with low on-state resistance and an independently connected low forward voltage schottky diode for minimum condution losses. Max rDS(on) = 142 mΩ at VGS = -4.5 V, ID = -2.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V IGSS Gate to Source Leakage Current VGS = ±8 V, VDS = 0 V -20 V -12 mV/°C -1 μA ±10 μA -1.
PAGE 3
Notes: 1. RθJA is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. (a) MOSFET RθJA = 90 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. (b) MOSFET RθJA = 195 °C/W when mounted on a minimum pad of 2 oz copper. (c) Schottky RθJA = 110 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062" thick PCB.
PAGE 4
6 -ID, DRAIN CURRENT (A) VGS = -3 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 3 VGS = -4.5 V VGS = -2.5 V 4 VGS = - 1.8 V 2 VGS = -1.5 V 0 0 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0.5 1.0 1.5 -VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = -1.5 V 2 1 0 2.0 0 4 6 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 500 ID = -2.3 A VGS = -4.5 V rDS(on), DRAIN TO 1.4 1.2 1.0 0.
PAGE 5
1000 ID = -2.3 A Ciss VDD = -8 V CAPACITANCE (pF) -VGS, GATE TO SOURCE VOLTAGE (V) 4.5 3.0 VDD = -10 V 1.5 VDD = -12 V 100 Coss Crss f = 1 MHz VGS = 0 V 0.0 0 2 4 10 0.1 6 1 Figure 7. Gate Charge Characteristics 20 Figure 8. Capacitance vs Drain to Source Voltage 10 -1 10 -Ig, GATE LEAKAGE CURRENT (A) 100 us -ID, DRAIN CURRENT (A) 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 1 ms 1 10 ms THIS AREA IS LIMITED BY rDS(on) 0.
PAGE 6
P(PK), PEAK TRANSIENT POWER (W) 1000 SINGLE PULSE o RθJA = 195 C/W 100 o TA = 25 C 10 1 0.3 -4 10 -3 -2 10 -1 10 10 1 100 10 1000 t, PULSE WIDTH (s) Figure 13. Single Pulse Maximum Power Dissipation 2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 195 C/W 0.
PAGE 7
FDFME2P823ZT Integrated P-Channel PowerTrench® MOSFET and Schottky Diode Dimensional Outline and Pad Layout ©2010 Fairchild Semiconductor Corporation FDFME2P823ZT Rev.C1 7 www.fairchildsemi.
PAGE 8
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.