Datasheet

FDG313N
FDG313N Rev. C
FDG313N
Digital FET, N-Channel
July 2000
1998 Fairchild Semiconductor Corporation
Absolute Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol Parameter FDG313N Units
V
DSS
Drain-Source Voltage 25 V
V
GSS
Gate-Source Voltage
±
8V
I
D
Drain Current - Continuous
(Note 1a)
0.95 A
- Pulsed 2
Power Dissipation for Single Operation
(Note 1a)
0.75 W
(Note 1b)
0.55
P
D
(Note 1c)
0.48
T
J
, T
stg
Operating and Storage Junction Temperature Range -55 to +150
°
C
ESD Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
6kV
Thermal Characteristics
R
θ
JA
Thermal Resistance, Junction-to-Ambient
(Note 1c)
260
°
C/W
Package Outlines and Ordering Information
Device Marking Device Reel Size Tape Width Quantity
.
13
FDG313N 7’’ 8mm 3000 units
General Description
This N-Channel enhancement mode field effect
transistor is produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state
resistance. This device has been designed especially
for low voltage applications as a replacement for
bipolar digital transistor and small signal MOSFET.
Applications
Load switch
Battery protection
Power management
Features
0.95 A, 25 V. R
DS(on)
= 0.45 @ V
GS
= 4.5 V
R
DS(on)
= 0.60 @ V
GS
= 2.7 V.
Low gate charge (1.64 nC typical)
Very low level gate drive requirements allowing direct
operation in 3V circuits (V
GS(th)
< 1.5V).
Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).
Compact industry standard SC70-6 surface mount
package.
SC70-6
D
S
D
G
D
D
pin
1
3
5
6
4
1
2
3

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