Datasheet
www.fairchildsemi.com
2
©2009 Fairchild Semiconductor Corporation
FDG410NZ Rev.B
FDG410NZ Single N-Channel PowerTrench
®
MOSFET
Electrical Characteristics T
J
= 25 °C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BV
DSS
Drain to Source Breakdown Voltage I
D
= 250 µA, V
GS
= 0 V 20 V
∆BV
DSS
∆T
J
Breakdown Voltage Temperature
Coefficient
I
D
= 250 µA, referenced to 25 °C 17 mV/°C
I
DSS
Zero Gate Voltage Drain Current V
DS
= 16 V, V
GS
= 0 V 1 µA
I
GSS
Gate to Source Leakage Current V
GS
= ±8 V, V
DS
= 0 V ±10 µA
V
GS(th)
Gate to Source Threshold Voltage V
GS
= V
DS
, I
D
= 250 µA 0.4 0.7 1.0 V
∆V
GS(th)
∆T
J
Gate to Source Threshold Voltage
Temperature Coefficient
I
D
= 250 µA, referenced to 25 °C -3 mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= 4.5 V, I
D
= 2.2 A 50 70
mΩ
V
GS
= 2.5 V, I
D
= 2.0 A 56 77
V
GS
= 1.8 V, I
D
= 1.8 A 67 87
V
GS
= 1.5 V, I
D
= 1.5 A 83 115
V
GS
= 4.5 V, I
D
= 2.2 A,
T
J
= 125 °C
71 100
g
FS
Forward Transconductance V
DD
= 5 V, I
D
= 2.2 A 11 S
C
iss
Input Capacitance
V
DS
= 10 V, V
GS
= 0 V,
f = 1 MHz
400 535 pF
C
oss
Output Capacitance 70 95 pF
C
rss
Reverse Transfer Capacitance 45 70 pF
R
g
Gate Resistance 2.8 Ω
t
d(on)
Turn-On Delay Time
V
DD
= 10 V, I
D
= 2.2 A,
V
GS
= 4.5 V, R
GEN
= 6 Ω
5.3 11 ns
t
r
Rise Time 2.3 10 ns
t
d(off)
Turn-Off Delay Time 18 33 ns
t
f
Fall Time 2.3 10 ns
Q
g
Total Gate Charge
V
GS
= 4.5 V, V
DD
= 10 V,
I
D
= 2.2 A
5.1 7.2 nC
Q
gs
Gate to Source Charge 0.6 nC
Q
gd
Gate to Drain “Miller” Charge 1.0 nC
I
S
Maximum Continuous Drain-Source Diode Forward Current 0.35 A
V
SD
Source to Drain Diode Forward Voltage V
GS
= 0 V, I
S
= 0.35 A (Note 2) 0.6 1.2 V
t
rr
Reverse Recovery Time
I
F
= 2.2 A, di/dt = 100 A/µs
11 20 ns
Q
rr
Reverse Recovery Charge 2.5 10 nC
Notes:
1. R
θJA
is determined with the device mounted on a 1 in
2
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJC
is guaranteed by design while R
θJA
is determined by
the user's board design.
2. Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
a. 300 °C/W when mounted
on a 1 in
2
pad of 2 oz copper.
b. 333 °C/W when mounted on a
minimum pad of 2 oz copper.