Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDMA1023PZ, MOSFET

FDMA1023PZ Dual P-Channel PowerTrench

MOSFET

FDMA1023PZ Rev.C4

www.fairchildsemi.com

FDMA1023PZ

Dual P-Channel PowerTrench

MOSFET

–20V, –3.7A, 72m:

Features

 Max r

DS(on)

= 72m: at V

= –4.5V, I

= –3.7A

 Max r

DS(on)

= 95m: at V

= –2.5V, I

= –3.2A

 Max r

DS(on)

= 130m: at V

= –1.8V, I

= –2.0A

 Max r

DS(on)

= 195m: at V

= –1.5V, I

= –1.0A

 Low profile - 0.8 mm maximum - in the new package

MicroFET 2x2 mm

 HBM ESD protection level > 2kV typical (Note 3)

 RoHS Compliant

General Description

This device is designed specifically as a single package

solution for the battery charge switch in cellular handset

and other ultra-portable applications. It features two independent

P-Channel MOSFETs with low on-state resistance for minimum

conduction

losses. When connected in the typical common

source configuration, bi-directional current flow is possible.

The MicroFET 2X2 package offers exceptional thermal

performance for its physical size and is well suited to linear mode

applications.

MOSFET Maximum Ratings

= 25°C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage –20 V

Gate to Source Voltage ±8 V

Drain Current -Continuous (Note 1a) –3.7

-Pulsed –6

Power Dissipation (Note 1a)

(Note 1b)

1.5

0.7

, T

STG

Operating and Storage Junction Temperature Range –55 to +150 °C

TJA

Thermal Resistance for Single Operation, Junction to Ambient (Note 1a) 86

°C/W

TJA

Thermal Resistance for Single Operation, Junction to Ambient  (Note 1b) 173

TJA

Thermal Resistance for Dual Operation, Junction to Ambient  (Note 1c) 69

TJA

Thermal Resistance for Dual Operation, Junction to Ambient  (Note 1d) 151

Device Marking Device Package Reel Size Tape Width Quantity

023 FDMA1023PZ MicroFET 2X2 7” 8mm 3000 units

MicroFET 2X2

Pin 1

Free from halogenated compounds and antimony

oxides



July 2014

Summary of content (7 pages)

PAGE 1
Dual P-Channel PowerTrench® MOSFET –20V, –3.7A, 72m: Features General Description Max rDS(on) = 72m: at VGS = –4.5V, ID = –3.7A This device is designed specifically as a single package solution for the battery charge switch in cellular handset and other ultra-portable applications. It features two independent P-Channel MOSFETs with low on-state resistance for minimum conduction losses. When connected in the typical common source configuration, bi-directional current flow is possible.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = –250PA, VGS = 0V 'BVDSS 'TJ Breakdown Voltage Temperature Coefficient –20 V ID = –250PA, referenced to 25°C IDSS Zero Gate Voltage Drain Current VDS = –16V, VGS = 0V –1 PA IGSS Gate to Source Leakage Current VGS = ±8V, VDS = 0V ±10 PA –1.
PAGE 3
1: RTJA is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RTJCis guaranteed by design while RTJA is determined by the user's board design. (a) RTJA = 86°C/W when mounted on a 1in2 pad of 2 oz copper, 1.5" x 1.5" x 0.062" thick PCB. For single operation. (b) RTJA = 173°C/W when mounted on a minimum pad of 2 oz copper. For single operation. (c) RTJA = 69oC/W when mounted on a 1in2 pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB, For dual operation.
PAGE 4
-ID, DRAIN CURRENT (A) VGS = -1.8V VGS = -4.5V 5 VGS = -3.0V VGS = -2.5V VGS = -2.0V 4 3 VGS = -1.5V 2 1 PULSE DURATION = 300Ps DUTY CYCLE = 2.0%MAX 0 0.0 0.5 1.0 1.5 2.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 6 2.0 VGS = -1.5V 2.2 VGS = -1.8V VGS = -3.0V 1.8 VGS = -2.5V 1.4 1.0 0.6 0 1 2 3 4 -ID, DRAIN CURRENT(A) 5 6 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 200 ID = -3.7A VGS = -4.5V 1.
PAGE 5
-VGS, GATE TO SOURCE VOLTAGE(V) 5 1000 ID = -3.7A Ciss CAPACITANCE (pF) 4 VDD = -5V 3 VDD = -10V 2 VDD = -15V 1 100 f = 1MHz VGS = 0V 0 0 2 4 6 Qg, GATE CHARGE(nC) 8 40 0.1 10 20 10 rDS(on) LIMIT 100us 1ms 1 10ms VGS=-4.5V 0.1 100ms 1s 10s DC SINGLE PULSE o R =173 TJA C/W o TA = 25 C 0.01 0.1 1 60 10 Crss 20 1 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 8. Capacitance Characteristics P(PK), PEAK TRANSIENT POWER (W) Figure 7.
PAGE 6
FDMA1023PZ Dual P-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 7
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.