Datasheet

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FDMA3023PZ Rev.C1

www.fairchildsemi.com

FDMA3023PZ Dual P-Channel PowerTrench

MOSFET

FDMA3023PZ

Dual P-Channel PowerTrench

MOSFET

-30 V, -2.9 A, 90 mΩ

Features

 Max r

DS(on)

= 90 mΩ at V

= -4.5 V, I

= -2.9 A

 Max r

DS(on)

= 130 mΩ at V

= -2.5 V, I

= -2.6 A

 Max r

DS(on)

= 170 mΩ at V

= -1.8 V, I

= -1.7 A

 Max r

DS(on)

= 240 mΩ at V

= -1.5 V, I

= -1.0 A

 Low profile - 0.8 mm maximum - in the new package MicroFET

2x2 mm

 HBM ESD protection level > 2 kV (Note 3)

 RoHS Compliant

 Free from halogenated compounds and antimony

oxides

General Description

This device is designed specifically as a single package solution

for the battery charge switch in cellular handset and other

ultra-portable applications. It features two independent

P-Channel MOSFETs with low on-state resistance for minimum

conduction losses. When connected in the typical common

source configuration, bi-directional current flow is possible.

The MicroFET 2X2 package offers exceptional thermal

performance for its physical size and is well suited to linear mode

applications.

S1 G1 D2

MicroFET 2x2

D1 G2

PIN 1

D1 D2

MOSFET Maximum Ratings

= 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage -30 V

Gate to Source Voltage ±8 V

Drain Current -Continuous (Note 1a) -2.9

-Pulsed -6

Power Dissipation (Note 1a) 1.4

Power Dissipation (Note 1b) 0.7

, T

STG

Operating and Storage Junction Temperature Range -55 to +150 °C

θJA

Thermal Resistance for Single Operation, Junction to Ambient (Note 1a) 86

°C/W

θJA

Thermal Resistance for Single Operation, Junction to Ambient (Note 1b) 173

θJA

Thermal Resistance for Dual Operation, Junction to Ambient (Note 1c) 69

θJA

Thermal Resistance for Dual Operation, Junction to Ambient (Note 1d) 151

Device Marking Device Package Reel Size Tape Width Quantity

323 FDMA3023PZ MicroFET 2X2 7 ’’ 8 mm 3000 units

July 2014

Summary of content (8 pages)

PAGE 1
FDMA3023PZ Dual P-Channel PowerTrench® MOSFET -30 V, -2.9 A, 90 mΩ Features General Description This device is designed specifically as a single package solution for the battery charge switch in cellular handset and other ultra-portable applications. It features two independent P-Channel MOSFETs with low on-state resistance for minimum conduction losses. When connected in the typical common source configuration, bi-directional current flow is possible. Max rDS(on) = 90 mΩ at VGS = -4.5 V, ID = -2.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = -24 V, VGS = 0 V -1 μA IGSS Gate to Source Leakage Current VGS = ±8 V, VDS = 0 V ±100 nA -1.
PAGE 3
1. RθJA is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. (a) RθJA = 86 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. For single operation. (b) RθJA = 173 °C/W when mounted on a minimum pad of 2 oz copper. For single operation. (c) RθJA = 69 oC/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 ” x 1.5 ” x 0.062 ” thick PCB.
PAGE 4
6 VGS = -4.5 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE -ID, DRAIN CURRENT (A) 6 VGS = -3.5 V 5 VGS = -2.5 V 4 VGS = -1.8 V 3 VGS = -1.5 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 2 1 0 0 0.5 1.0 1.5 2.0 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 5 VGS = -1.5 V 4 3 1 1 2 4 5 6 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 400 ID = -2.9 A VGS = -4.5 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX SOURCE ON-RESISTANCE (mΩ) ID = -1.
PAGE 5
1000 ID = -2.9 A 4 VDD = -10 V CAPACITANCE (pF) -VGS, GATE TO SOURCE VOLTAGE (V) 5 VDD = -15 V 3 VDD = -20 V 2 1 Ciss 100 Coss 0 0 2 4 6 8 10 0.1 10 Qg, GATE CHARGE (nC) 1 30 Figure 8. Capacitance vs Drain to Source Voltage 10 -2 10 THIS AREA IS LIMITED BY rDS(on) 10 -ID, DRAIN CURRENT (A) VGS = 0 V -3 -4 10 -5 10 TJ = 125 oC -6 10 TJ = 25 oC -7 10 1 ms 1 10 ms 100 ms 0.1 1s SINGLE PULSE TJ = MAX RATED 10 s RθJA = 173 oC/W -8 10 o DC TA = 25 C 0.01 0.
PAGE 6
2 IMPEDANCE, ZθJA NORMALIZED THERMAL 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o 0.01 0.005 -3 10 R θ JA = 173 C/W 10 -2 10 -1 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Junction-to-Ambient Transient Thermal Response Curve ©2013 Fairchild Semiconductor Corporation FDMA3023PZ Rev.C1 6 www.fairchildsemi.
PAGE 7
FDMA3023PZ Dual P-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 8
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.