Datasheet

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FDMA530PZ Single P-Channel PowerTrench

MOSFET

FDMA530PZ Rev.C2

www.fairchildsemi.com

FDMA530PZ

Single P-Channel PowerTrench

MOSFET

–30V, –6.8A, 35mΩ

Features

 Max r

DS(on)

= 35mΩ at V

= –10V, I

= –6.8A

 Max r

DS(on)

= 65mΩ at V

= –4.5V, I

= –5.0A

 Low profile - 0.8mm maximum - in the new package MicroFET

2X2 mm

RoHS Compliant

General Description

This device is designed specifically for battery charge or load

switching in cellular handset and other ultraportable

applications . It features a MOSFET with low on-state resistance.

The MicroFET 2X2 package offers exceptional thermal

per

formance for its physical size and is well suited to linear mode

applications.

MOSFET Maximum Ratings

= 25°C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage –30 V

Gate to Source Voltage ±25 V

Drain Current -Continuous (Note 1a) –6.8

-Pulsed –24

Power Dissipation (Note 1a) 2.4

Power Dissipation (Note 1b) 0.9

, T

STG

Operating and Storage Junction Temperature Range –55 to +150 °C

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 52

°C/W

θJA

Thermal Resistance, Junction to Ambient (Note 1b) 145

Device Marking Device Package Reel Size Tape Width Quantity

530 FDMA530PZ MicroFET 2X2 7’’ 8mm 3000 units

Bottom Drain Contact

Pin 1

Drain

Source

MicroFET 2X2 (Bottom View)



HBM ESD protection level > 3k V typical (Note 3)



Free from halogenated compounds and antimony oxides

June 2014

Summary of content (6 pages)

PAGE 1
FDMA530PZ Single P-Channel PowerTrench® MOSFET –30V, –6.8A, 35mΩ Features General Description Max rDS(on) = 35mΩ at VGS = –10V, ID = –6.8A This device is designed specifically for battery charge or load switching in cellular handset and other ultraportable applications . It features a MOSFET with low on-state resistance. Max rDS(on) = 65mΩ at VGS = –4.5V, ID = –5.0A Low profile - 0.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient IGSS Gate to Source Leakage Current IDSS Zero Gate Voltage Drain Current ID = –250μA, VGS = 0V –30 ID = –250μA, referenced to 25°C V –23 VDS = –24V, VGS = 0V VGS = ±25V, VDS = 0V mV/°C -1 μA ±10 μA –3 V On Characteristics VGS(th) Gate to Source Threshold Voltage ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperatur
PAGE 3
VGS = - 4.5V 20 VGS = -10V VGS = - 4.0V VGS = - 5.0V 16 12 VGS = - 3.5V 8 4 PULSE DURATION = 80μs DUTY CYCLE = 0.5%MAX 0 0 1 2 3 4 -VDS, DRAIN TO SOURCE VOLTAGE (V) 3.5 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE -ID, DRAIN CURRENT (A) 24 5 1.5 0.5 rDS(on), DRAIN TO SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.2 1.
PAGE 4
FDMA530PZ Single P-Channel PowerTrench® MOSFET 10 2000 ID = -6.8A VDD = -15V 6 VDD = -20V 4 2 0 0 3 6 9 12 Qg, GATE CHARGE(nC) 15 Coss 100 60 VGS = 0V 1E-5 -ID, DRAIN CURRENT (A) -Ig, GATE LEAKAGE CURRENT(A) 1 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) TJ = 125oC 1E-6 1E-7 TJ = 1E-8 25oC 10 100us 1 1ms VGS= -4.5V 10ms SINGLE PULSE 0.1 R 100ms 1s 10s DC o =145 θJA C/W o 5 10 15 20 25 30 0.01 0.
PAGE 5
FDMA530PZ Single P-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to ver obtain the most recent revision.
PAGE 6
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.