Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDMC7660DC, MOSFET

January 2011

FDMC7660DC Rev.C3

www.fairchildsemi.com

FDMC7660DC N-Channel Dual Cool

PowerTrench

MOSFET

FDMC7660DC

N-Channel Dual Cool

PowerTrench

MOSFET

30 V, 40 A, 2.2 mΩ

Features

 Dual Cool

Top Side Cooling PQFN package

 Max r

DS(on)

= 2.2 mΩ at V

= 10 V, I

= 22 A

 Max r

DS(on)

= 3.3 mΩ at V

= 4.5 V, I

= 18 A

 High performance technology for extremely low r

DS(on)

 SyncFET Schottky Body Diode

 RoHS Compliant

General Description

This N-Channel MOSFET is produced using Fairchild

Semiconductor’s advanced PowerTrench

process.

Advancements in both silicon and Dual Cool

package

technologies have been combined to offer the lowest

DS(on)

while maintaining excellent switching performance by extremely

low Junction-to-Ambient thermal resistance.

Applications

 Synchronous Rectifier for DC/DC Converters

 Telecom Secondary Side Rectification

 High End Server/Workstation

MOSFET Maximum Ratings T

= 25°C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage 30 V

Gate to Source Voltage (Note 4) ±20 V

Drain Current -Continuous (Package limited) T

= 25 °C 40

-Continuous (Silicon limited) T

= 25 °C 150

-Continuous T

= 25 °C (Note 1a) 30

-Pulsed 200

Single Pulse Avalanche Energy (Note 3) 220 mJ

dv/dt Peak Diode Recovery dv/dt (Note 5) 1.0 V/ns

Power Dissipation T

= 25 °C 78

Power Dissipation T

= 25 °C (Note 1a) 3.0

, T

STG

Operating and Storage Junction Temperature Range -55 to + 150 °C

θJC

Thermal Resistance, Junction to Case (Top Source) 4.3

°C/W

θJC

Thermal Resistance, Junction to Case (Bottom Drain) 1.6

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 42

θJA

Thermal Resistance, Junction to Ambient (Note 1b) 105

θJA

Thermal Resistance, Junction to Ambient (Note 1i) 17

θJA

Thermal Resistance, Junction to Ambient (Note 1j) 26

θJA

Thermal Resistance, Junction to Ambient (Note 1k) 12

Device Marking Device Package Reel Size Tape Width Quantity

7660 FDMC7660DC Dual Cool

Power 33 13’’ 12 mm 3000 units

Top

Power 33

Bottom

Pin 1

Summary of content (8 pages)

PAGE 1
N-Channel Dual CoolTM PowerTrench® MOSFET 30 V, 40 A, 2.2 mΩ Features Dual CoolTM General Description Top Side Cooling PQFN package This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench® process. Advancements in both silicon and Dual CoolTM package technologies have been combined to offer the lowest rDS(on) while maintaining excellent switching performance by extremely low Junction-to-Ambient thermal resistance. Max rDS(on) = 2.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V 100 nA 2.
PAGE 3
RθJC Thermal Resistance, Junction to Case (Top Source) 4.3 RθJC Thermal Resistance, Junction to Case (Bottom Drain) 1.
PAGE 4
200 4 VGS = 6 V VGS = 8 V ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V 150 VGS = 4.5 V 100 VGS = 4 V 50 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.0 0.2 0.4 0.6 0.8 VGS = 4 V 3 VGS = 4.5 V 2 VGS = 6 V 1 0 1.0 0 Figure 1. On Region Characteristics 50 100 ID, DRAIN CURRENT (A) rDS(on), DRAIN TO 1.4 1.2 1.0 0.
PAGE 5
6000 ID = 22 A Ciss 8 VDD = 10 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 6 VDD = 15 V VDD = 20 V 4 2 1000 100 10 20 30 40 50 f = 1 MHz VGS = 0 V Crss 50 0.1 0 0 Coss 60 1 10 Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 160 30 o ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) VGS = 10 V TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC RθJC = 1.6 C/W 120 VGS = 4.5 V 80 40 Limited by Package 1 0.01 0.
PAGE 6
NORMALIZED THERMAL IMPEDANCE, ZθJA 2 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.01 t1 t2 0.001 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 105 C/W 0.0001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2011 Fairchild Semiconductor Corporation FDMC7660DC Rev.C3 6 www.fairchildsemi.
PAGE 7
FDMC7660DC N-Channel Dual CoolTM PowerTrench® MOSFET Dimensional Outline and Pad Layout ©2011 Fairchild Semiconductor Corporation FDMC7660DC Rev.C3 7 www.fairchildsemi.
PAGE 8
tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.