Datasheet

ManualsBrandsFAIRCHILD SEMICONDUCTOR ManualsFETsFDMC7680, MOSFET

June 2014

FDMC7680 Rev.C5

www.fairchildsemi.com

FDMC7680 N-Channel Power Trench

MOSFET

FDMC7680

N-Channel Power Trench

MOSFET

30 V, 14.8 A, 7.2 mΩ

Features

 Max r

DS(on)

= 7.2 mΩ at V

= 10 V, I

= 14.8 A

 Max r

DS(on)

= 9.5 mΩ at V

= 4.5 V, I

= 12.4 A

 High performance technology for extremely low r

DS(on)

 Termination is Lead-free and RoHS Compliant

General Description

This N-Channel MOSFET is produced using Fairchild

Semiconductor’s advanced Power

Trench

process that has

been especially tailored to minimize the on-state resistance.

This

device is well suited for Power Management and load switching

applications common in Notebook Computers and Portable

Battery Packs.

Application

 DC - DC Buck Converters

 Notebook battery power management

 Load switch in Notebook

MOSFET Maximum Ratings T

= 25 °C unless otherwise noted

Thermal Characteristics

Package Marking and Ordering Information

Symbol Parameter Ratings Units

Drain to Source Voltage 30 V

Gate to Source Voltage ±20 V

Drain Current -Continuous T

= 25 °C 18

A -Continuous T

= 25 °C (Note 1a) 14.8

-Pulsed 45

Single Pulse Avalanche Energy (Note 3) 72 mJ

Power Dissipation T

= 25 °C 31

Power Dissipation T

= 25 °C (Note 1a) 2.3

, T

STG

Operating and Storage Junction Temperature Range -55 to +150 °C

θJC

Thermal Resistance, Junction to Case 4.0

°C/W

θJA

Thermal Resistance, Junction to Ambient (Note 1a) 53

Device Marking Device Package Reel Size Tape Width Quantity

FDMC7680 FDMC7680 MLP 3.3x3.3 13 ’’ 12 mm 3000 units

Bottom

Top

Pin 1

MLP 3.3x3.3

Summary of content (7 pages)

PAGE 1
FDMC7680 N-Channel Power Trench® MOSFET 30 V, 14.8 A, 7.2 mΩ Features General Description Max rDS(on) = 7.2 mΩ at VGS = 10 V, ID = 14.8 A This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced Power Trench® process that has been especially tailored to minimize the on-state resistance. This device is well suited for Power Management and load switching applications common in Notebook Computers and Portable Battery Packs. Max rDS(on) = 9.5 mΩ at VGS = 4.5 V, ID = 12.
PAGE 2
Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current IGSS Gate to Source Leakage Current 30 V 15 VDS = 24 V, VGS = 0 V mV/°C 1 TJ = 125 °C 250 VGS = 20 V, VDS = 0 V μA 100 nA 3.
PAGE 3
PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = 10 V VGS = 6 V 36 VGS = 3.5 V VGS = 4.5 V 27 VGS = 4 V 18 9 VGS = 3 V 0 0.0 0.5 1.0 1.5 4.0 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 45 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 3.5 VGS = 3.5 V 3.0 2.5 VGS = 4.5 V 2.0 VGS = 4 V 1.5 1.0 2.0 0 9 18 VDS, DRAIN TO SOURCE VOLTAGE (V) 45 25 rDS(on), DRAIN TO ID = 14.8 A VGS = 10 V 1.2 1.0 0.8 0.
PAGE 4
3000 ID = 14.8 A VDD = 10 V 8 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 20 V VDD = 15 V 6 4 2 Ciss 1000 Coss 100 0 0 4 8 12 16 20 24 28 f = 1 MHz VGS = 0 V Figure 7. Gate Charge Characteristics ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) TJ = 25 oC TJ = 100 oC TJ = 125 oC 50 VGS = 10 V 40 30 VGS = 4.5 V 20 10 0.1 1 10 P(PK), PEAK TRANSIENT POWER (W) ID, DRAIN CURRENT (A) 10 1 ms 10 ms 100 ms 1s 10 s DC TA = 25 oC 0.
PAGE 5
NORMALIZED THERMAL IMPEDANCE, ZθJA 2 1 0.1 0.01 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.001 t2 SINGLE PULSE NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA o RθJA = 125 C/W 0.0001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Transient Thermal Response Curve ©2011 Fairchild Semiconductor Corporation FDMC7680 Rev.C5 5 www.fairchildsemi.
PAGE 6
FDMC7680 N-Channel Power Trench® MOSFET Dimensional Outline and Pad Layout Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision.
PAGE 7
tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.