Datasheet
www.fairchildsemi.com
2
©2011 Fairchild Semiconductor Corporation
FDMC8010 Rev.C1
FDMC8010 N-Channel PowerTrench
®
MOSFET
Electrical Characteristics T
J
= 25 °C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BV
DSS
Drain to Source Breakdown Voltage I
D
= 1 mA, V
GS
= 0 V30 V
ΔBV
DSS
ΔT
J
Breakdown Voltage Temperature
Coefficient
I
D
= 1 mA, referenced to 25 °C 15 mV/°C
I
DSS
Zero Gate Voltage Drain Current V
DS
= 24 V, V
GS
= 0 V1μA
I
GSS
Gate to Source Leakage Current V
GS
= 20 V, V
DS
= 0 V 100nA
V
GS(th)
Gate to Source Threshold Voltage V
GS
= V
DS
, I
D
= 1 mA 1.2 1.5 2.5 V
ΔV
GS(th)
ΔT
J
Gate to Source Threshold Voltage
Temperature Coefficient
I
D
= 1 mA, referenced to 25 °C -5 mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= 10 V, I
D
= 30 A 0.91.3
mΩV
GS
= 4.5 V, I
D
= 25 A1.31.8
V
GS
= 10 V, I
D
= 30A, T
J
= 125 °C 1.3 2
g
FS
Forward Transconductance V
DS
= 5 V, I
D
= 30 A 188 S
C
iss
Input Capacitance
V
DS
= 15 V, V
GS
= 0 V,
f = 1 MHz
4405 5860 pF
C
oss
Output Capacitance 1570 2090 pF
C
rss
Reverse Transfer Capacitance 167 250 pF
R
g
Gate Resistance 0.5 Ω
t
d(on)
Turn-On Delay Time
V
DD
= 15 V, I
D
= 30 A,
V
GS
= 10 V, R
GEN
= 6 Ω
15 27 ns
t
r
Rise Time 7.5 15 ns
t
d(off)
Turn-Off Delay Time 40 64 ns
t
f
Fall Time 5.3 11 ns
Q
g
Total Gate Charge V
GS
= 0 V to 10 V
V
DD
= 15 V,
I
D
= 30 A
67 94 nC
Q
g
Total Gate Charge V
GS
= 0 V to 4.5 V3245nC
Q
gs
Gate to Source Charge 10 nC
Q
gd
Gate to Drain “Miller” Charge 9.5 nC
V
SD
Source to Drain Diode Forward Voltage
V
GS
= 0 V, I
S
= 2 A (Note 2) 0.6 1.2
V
V
GS
= 0 V, I
S
= 30 A (Note 2) 0.7 1.2
t
rr
Reverse Recovery Time
I
F
= 30 A, di/dt = 100 A/μs
49 78 ns
Q
rr
Reverse Recovery Charge 29 46 nC
Notes:
1. R
θJA
is determined with the device mounted on a 1 in
2
pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
θJC
is guaranteed by design while R
θCA
is determined by
the user's board design.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. E
AS
of 153 mJ is based on starting T
J
= 25 °C, L = 0.3 mH, I
AS
= 32 A, V
DD
= 27 V, V
GS
= 10 V. 100% test at L = 0.1 mH, I
AS
= 47 A.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied.
a. 53 °C/W when mounted on a
1 in
2
pad of 2 oz copper.
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
G
DF
DS
SF
SS
G
DF
DS
SF
SS